SC2463TSTRT 查看數據表（PDF） - Semtech Corporation
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SC2463TSTRT Datasheet PDF : 23 Pages
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SC2463
POWER MANAGEMENT
Applications Information (Cont.)
Where, T is switching cycle period.
Because the inductor current ramps up according to Vin
–Vo, and down with Vo, a falling output voltage in over
current condition moves the inductor “ramp up” cur-
rent up faster and the peak current IP larger but the
“ramp down” current slower. As long as the current is
still larger than the current limiting threshold, the top
switch is held off. The switching frequency is folded back
lower but average current is still relatively high.
An example is shown in Typical Characteristics section
with input voltage 12V and output voltage 5V with out-
put current 3.5A.
The preset valley current limit is 5A, which has to be
greater than full load current 3.5A. When the output is
shorted, the inductor peak current and the load current,
both are a function of the input voltage and the output
inductance, would be higher than the current limit. There-
fore, proper thermal management and inductor satura-
tion current rating have to be considered at the worst
conditions.
Loop Compensation
L - Output inductance
C - Output capacitance
RC - Output capacitor ESR
VIN - Input voltage
The transfer function of the error amplifier with external
compensation network is as follows:
(1+ s )(1+ s )
GCOMP (s)
=
ωI
s
⋅
(1 +
ωZ1
s )(1+
ωZ2
s)
ωP1
ωP2
referring to Fig. 7, where,
ωZ1
=
R
1
2C1
,
ωZ2
=
(R1
1
+ R3 )C2
ωI
=
1
R1(C1 +
C3
)
,
ωP1
=
1
R3C2
, ωP2
=
R2
1
C1C3
C1 + C3
C3
C2 R3
R2
C1
SC2463 is a voltage mode buck controller with high gain
bandwidth error amplifier utilizing external network com-
pensation to regulate output voltage.
For a DC/DC converter, it is usually required that the
converter has a loop gain of a high crossover frequency
for fast load response, high DC and low frequency gain
for low steady state error, and enough phase margin for
its operating stability. Often one can not have all these
properties at the same time. The purpose of the loop
compensation is to arrange the poles and zeros of the
compensation network to meet the requirements for a
specific application.
The power stage of a buck converter control-to-output
transfer function is as shown below:
G VD
(s)
=
VIN
1
1+ sRCC
+
s
L
R
+
s2LC
R1
-
+
Vref
Figure 7. Voltage Mode Buck Converter Compensation
Network
With the compensation, the converter total loop gain is
as follows:
T(s) = GPWM ⋅ GCOMP(s) ⋅ GVD(s) =
1
VM
⋅ ωI
s
⋅
VI
⋅
1+
1+
s
ωZ1
s
ωP1
1+ s
⋅
⋅
1
+
ωZ2
s
ωP2
1+
s
1
⋅
1
+
s
RC ⋅ C4
L1
R
+
s2L1C
Where:
GPWM = PWM gain
VM = 3.0V, ramp peak to valley voltage of SC2463
The design guidelines are as follows:
where,
1
ωO = LC
2007 Semtech Corp.
1. Set the loop gain crossover frequency ωC less than
1/5th the switching frequency.
2. Place an integrator in the origin to increase DC and
low frequency gains.
18
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