SC4611 查看數據表（PDF） - Semtech Corporation
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SC4611 Datasheet PDF : 11 Pages
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SC4611
POWER MANAGEMENT
Applications Information (Cont.)
2). The high power, high current parts of the circuit should
be laid out first. The on time loop formed by the input
capacitor Cin, the high side FET Q the output inductor and
T,
the output capacitor bank Cout must be kept as small as
possible. Another loop area to minimise is formed by low
side FET Q the output inductor and the output capacitor
B,
bank Cout during the off period. These loops contain all
the high current, fast transition switching. Connections
should be as wide and as short as possible to minimize
loop inductance.
3). The connection between the junction of Q , Q and the
TB
output inductor should be a wide trace or copper region. It
should be as short as practical. Since this connection has
fast voltage transitions, keeping this connection short will
minimize EMI. Also keep the Phase connection to the IC
short. The top FET gate charge currents flow in this trace.
3.3V/10A Evaluation Board Schematic
4) The output capacitor Cout should be located as close to
the load terminals as possible. Fast transient load currents
are supplied by Cout and connections between Cout and
the load must be kept short with wide copper areas to
minimize inductance and resistance. This will improve the
transient response to step loads.
5) The SC4611 is best placed over a quiet ground plane
area. Avoid pulse currents of the Cin, QT, QB loop flowing in
this area. This analog ground plane should be connected
to the power ground plane at a “quiet” point near the input
capacitor. Under no circumstance should it be returned to
a point inside the Cin, QT, QB, Cout power ground loops.
6) The SC4611 AGND pin is connected to the separate
analog ground plane with minimum lead length . All analog
grounding paths including decoupling capacitors, feedback
resistors, compensation components, and current-limit
setting resistors should be connected to the same plane.
J1
VIN
C1
J2
RTN
J6-3
SS
J6-4
J6-1
VGG
J6-2
RTN
L1 SHORT
R2 C2
3.3V
R7
1K
C3 C4
T P6
T P2
R1
GDH
PH
R3
T P5
R6
GDL
TP14
R8
10-15V Vin to 3.3V/10A 300 kHz Reference Design With SC4611
VDC
T P1
6612
Q1
1R
N/U
6670
Q3
2R
2R
N/U
Q2
T P3 .01R/1W
L2 2.2 uF
R4
T P4
J3
R5
Q4
TP15
.01R/1W
VOUT
C5 C6 C7 C8 C9
6670
J4
RTN
Q5
AVCC
R9
3906
T P7
5R
PVCC
R10
C10
10K
1K
C16
100 uF
1 uF
C11
U1
D1
D3
N/U
BST
C17
C18
10 uF
100 uF
C19
10 uF
SC4611ITSTR
CS-
T P9
C13
C20 C21
1 nF
N/U
N/U
VOUT
R11 R12
10K
CLM
R13
1K
T P8
R17
20K
N/U
OVP
R18
10R
J5-1
RTN
J5-3
RED
D2
R19
2K
TP12
TP13
R21
R22
CS+
T P10
C14
C15
EAO
10 nF
R26
N/U
33.2K
10K
VFB
249R
R23
TP11
C12
2.2 nF
1.78K
R25
10R
+S
J5-2
J5-4
-S
2004 Semtech Corp.
10
www.semtech.com
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