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SI4704-C40 查看數據表(PDF) - Silicon Laboratories

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SI4704-C40
Silabs
Silicon Laboratories Silabs
SI4704-C40 Datasheet PDF : 36 Pages
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Si4704/05-C40
Table 8. Digital Audio Interface Characteristics
(VDD = 2.7 to 5.5 V, VIO = 1.85 to 3.6 V, TA = –20 to 85 °C)
Parameter
Symbol Test Condition Min
DCLK Cycle Time
tDCT
26
DCLK Pulse Width High
tDCH
10
DCLK Pulse Width Low
tDCL
10
DFS Set-up Time to DCLK Rising Edge
tSU:DFS
5
DFS Hold Time from DCLK Rising Edge
tHD:DFS
5
DOUT Propagation Delay from DCLK Falling
tPD:DOUT
0
Edge
Typ Max Unit
— 1000 ns
ns
ns
ns
ns
12
ns
DCLK
DFS
DOUT
tDCH
tDCL
tDCT
tHD:DFS
tSU:DFS
tPD:OUT
Figure 8. Digital Audio Interface Timing Parameters, I2S Mode
Rev. 1.0
11

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