SI5328C-C-GM 查看數據表（PDF） - Silicon Laboratories

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SI5328C-C-GM

ITU-T G.8262 SYNCHRONOUS ETHERNET JITTER-ATTENUATING CLOCK MULTIPLIER

Silicon Laboratories 

Si5328

Functional Block Diagram

TCXO or Refclock

CKIN1

CKIN2

Loss of Signal/

Frequency Offset

Loss of Lock

÷ N31

÷ N32

Refclock

Hitless Switching

Mux

DSPLL®

÷ N2

÷ N1_HS

÷ N1_LS

÷ N2_LS

Signal Detect

Control

I2C/SPI Port

Device Interrupt

Rate Select

Clock Select

CKOUT1

CKOUT2

VDD (2.5 or 3.3 V)

GND

2

Rev. 1.0

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