SIP12201 查看數據表（PDF） - Vishay Semiconductors

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SIP12201

Synchronous Step Down Controller

Vishay Semiconductors 

SiP12201

Vishay Siliconix

FUNCTIONAL BLOCK DIAGRAM

New Product

SiP12201

Vin

Regulator

VL

UVLO

Over

Temp

Over

Voltage

BST

DH

Soft Start

Shut Down

Comp

Over Current

LX

Sense

FB

GM

PWM Comp

Gate Control

Logic

0.6 V

OSC

500KHz

∆Vosc

BBM

VL

VL

DL

Pgnd

SD/Comp

Agnd

DETAILED OPERATIONAL DESCRIPTION

Enable/ON State:

The COMP/SD pin has 10 µA pull up current to ensure

auto startup as soon as the pin is released by the

external pull down MOS. When the internal reference

is ready, there will be a clamp current applied at

COMP/SD; this is to ensure the COMP/SD pin will not

go below 600 mV inadvertently due to the amplifier

excursion or noise. The COMP/SD has to go above

600 mV to enable the chip fully.

Soft Start:

Once the chip is out of shutdown and UVLO mode, the

soft start is initiated. The soft start is accomplished

done by ramping up the internal reference. During soft

start mode the chip can not enter into fault mode. If

there is an over current condition (current limit condi-

tion), the High Side Gate will be turned off and the Low

Side will be turned on. Once the soft start timing

elapses, the chip enters into a normal state of opera-

tion.

Disable/Shutdown/Off State

To disable the chip, the COMP/SD pin has to pulled

below 150 mV typically and the external pull down

MOSFET has to be able to sink at least 250 µA. Once

the pin reaches a voltage below the 150 mV level, the

chip will go into shutdown mode with only essential

curcuitry alive and the current bias of the chip will be

cut down to 120 µA level typically. Both High Side and

Low Side Gates are off.

UVLO:

The chip enters into Under Voltage Lockout when VL

is below 3.4 V (typical). Both High Side Gate and Low

Side Gate will be turned off. The chip will go out of

UVLO mode when VL is above 3.6 V (typical).

Output Over Voltage State:

When the Output voltage goes above 1.083 times

nominal Output Voltage, the overvoltage circuit will act

as a high speed clamp and the High Side Gate will be

turned off and the Low Side Gate will be on. The con-

dition will persist until the Output voltage drops below

the trigger voltage minus a hysteresis.

Output Over Current State:

The SiP12201 will enter a cycle by cycle over current

condition when the Low Side MOSFET is turned on,

the LX voltage falls below -170 mV with respect to

Power Ground. As long as the LX voltage remains

below -170 mV the Low Side MOSFET is still turned

on, the High Side MOSFET is off. If this condition

remains for seven consecutive cycles the IC will go

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Document Number: 73541

S-52332–Rev. B, 07-Nov-05

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