HC4046 查看數據表（PDF） - System Logic Semiconductor

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HC4046

Phase-Locked Loop High-Performance Silicon-Gate CMOS

System Logic Semiconductor 

SL74HC4046

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

VCC DC Supply Voltage (Referenced to GND)

VIN DC Input Voltage (Referenced to GND)

VOUT DC Output Voltage (Referenced to GND)

IIN

DC Input Current, per Pin

IOUT DC Output Current, per Pin

ICC

DC Supply Current, VCC and GND Pins

PD

Power Dissipation in Still Air, Plastic DIP+

SOIC Package+

Tstg Storage Temperature

TL

Lead Temperature, 1 mm from Case for 10 Seconds

(Plastic DIP or SOIC Package)

-0.5 to +7.0

V

-1.5 to VCC +1.5

V

-0.5 to VCC +0.5

V

±20

mA

±25

mA

±50

mA

750

mW

500

-65 to +150

°C

260

°C

*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C

SOIC Package: : - 7 mW/°C from 65° to 125°C

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

VCC

VCC

VIN, VOUT

TA

tr, tf

DC Supply Voltage (Referenced to GND) VCO only

DC Supply Voltage (Referenced to GND) NON-VCO

DC Input Voltage, Output Voltage (Referenced to GND)

Operating Temperature, All Package Types

Input Rise and Fall Time (Figure 1)

VCC =2.0 V

VCC =4.5 V

VCC =6.0 V

Min Max Unit

3.0

6.0

V

2.0

6.0

V

0

VCC

V

-55 +125

°C

0

1000

ns

0

500

0

400

This device contains protection circuitry to guard against damage due to high static voltages or electric

fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated

voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range

GND≤(VIN or VOUT)≤VCC.

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC).

Unused outputs must be left open.

SLS

System Logic

Semiconductor

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