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SLY2016 查看數據表(PDF) - Infineon Technologies

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SLY2016 Datasheet PDF : 5 Pages
1 2 3 4 5
AC Characteristics (guaranteed minimum timing
parameters at VCC=5.0 V ±0.5 V)
Parameter
Symbol –40°C +25°C +85°C
Unit
Address Set
TAS
Up Time
10
10
10
ns
Write Time
TW
Data Set Up
TDS
Time
60
70
90
ns
20
30
50
ns
Address Hold TAH
Time
20
30
40
ns
Data Hold Time TDH
20
Access Time
TACC (1) 90
Clear Disable TCLRD 1.0
Time
30
40
ns
110 140 ns
1.0
1.0
µs
Clear Time
TCLR
1.0
1.0
1.0
ms
Note:
1) TACC=Set Up Time + Write Time + Hold Time
Loading Data
The desired data code (D0–D6) and digit address (A0, A1) must
be held stable during the write cycle for storing new data.
Data entry may be asynchronous. Digit 0 is defined as right
hand digit with A1=A2=0.`
Clearing the entire internal four-digit memory can be accom-
plished by holding the clear (CLR) low for 1.0 msec minimum.
The clear function will clear the ASCII RAM. Loading an illegal
data code will display a blank.
Typical Loading State Table
WR A1 A0 D6 D5 D4 D3 D2 D1 D0 Digit
3210
H
previously loaded display
GRE Y
L L L H L L L H L H GRE E
L L H H L H L H L H GRUE
L H L H L L H H L L GL UE
L H H H L L L L H L BL UE
L L H H L L L H L H BL EE
L L L H L H L H H H BL EW
L X X see character code
see char. set
Display Blanking
Blank the display by loading a blank or space into each digit of
the display or by using the (BL) display blank input. Setting the
(BL) input low does not affect the contents of data memory.
A flashing circuit can easily be constructed using a 555 as table
multivibrator. Figure 3 illustrates a circuit in which varying R1
(100K~10K) will have a flash rate of 1.0 Hz~10 Hz.
The display can be dimmed by pulse width modulating the (BL)
at a frequency sufficiently fast to not interfere with the internal
clock. The dimming signal frequency should be 2.5 kHz or
higher. Dimming the display also reduces power consumption.
An example of a simple dimming circuit using a 556 is illus-
trated in Figure 4. Adjusting potentiometer R3 will dim the dis-
play by changing the blanking pulse duty cycle.
Figure 3. Flashing Circuit Using a 555 and Flashing
(Blanking) Timing
VCC=5.0 V
1
2
3
To BL
Pin on 4
Display
8
555
7
Timer
6
5
C4
0.01 µF
R1
4.7 K
R2
100 K
C3
10 µF
1
0
~~ 500 ms
~~2 Hz Blanking Frequency
Blanking Pulse Width
50% Duty Factor
Figure 4. Dimming Circuit Using a 556 and Dimming
(Blanking) Timing
R2
47 K
1
R1
200
2
C2
0.01 µF 3
4
5
C1
6
4700 pF
7
Dimming (Blanking)
Control
14
13
556
12
Dual Timer
11
10
9
8
VCC=5.0 V
R3
500 K
C3
1000 pF
C4
0.01 µF
To BL Pin
on Display
1
0
~~ 200 µs
~~ 5 KHz Blanking Frequency
Blanking Pulse Width
4 µs min., 196 µs max.
2000 Inneon Technologies Corp. Optoelectronics Division San Jose, CA
www.inneon.com/opto 1-888-Inneon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG Regensburg, Germany
www.osram-os.com +49-941-202-7178
3
SLR/SLO/SLG/SLY2016
March 23, 2000-01

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