SM8222A 查看數據表（PDF） - Nippon Precision Circuits

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SM8222A

Caller ID Service IC with Call Waiting

Nippon Precision Circuits  

SM8222A/B

FUNCTIONAL DESCRIPTION

The SM8222A/B conforms with the SR-TSV-

002476 (Bellcore) dialer telephone number display

standards. It supports the following functions.

s Ring signal detection

s FSK demodulation

s Dual tone detection

Using these functions enables systems with the fol-

lowing features to be easily constructed.

s Ring signal and polarity reversal signal detection

s dialer telephone number display before telephone

off-hook

s dialer telephone number display after telephone

off-hook (during conversation)

Ring Signal Detection

The telephone line input signals L1 and L2 pass

through surge protection circuits and are input to a

capacitor, resistor and diode bridge, as shown in the

typical application circuit example. The signal is

full-wave rectified by the diode bridge and the bridge

output is level shifted by the resistor voltage divider

for input to RDIN. A ring signal input on RDIN

causes RDRC to become active, driving an RC time

constant circuit formed by an external capacitor and

resistor, before the detection signal is output on

RDET. If the ring signal supplied by the inputs L1

and L2 is above the level set by the resistor divider,

then the detect output RDET goes LOW. When a

ring signal is detected, INT also goes LOW.

FSK Demodulation

The SM8222A/B incorporates an FSK demodulator

to recover the dialer telephone number and other

information which is sent as an FSK signal. It sup-

ports two demodulator output modes to facilitate var-

ious circuit design approaches.

The FSK signal (Bellcore) standard is described as

follows.

s Modulation type: Continuous-phase binary fre-

quency-shift-keying

s Logic 1 data (mark): 1200 ± 12 Hz

s Logic 0 data (space): 2200 ± 22 Hz

s Input level (mark): −32 to −12 dBm

s Input level (space): −36 to −12 dBm

s Transmission speed: 1200 ± 12 baud

The FSK output is controlled by the FSKEN pin.

When FSKEN is HIGH, the signal pins DOUT,

DCLK, DR and CDET are all HIGH.

The decoded FSK signal is output on DOUT. The

mode of the output timing circuit, mode 0 or mode 1,

is set by the input on MODE.

Mode 0

In mode 0, the received data and the clock that the

data is synchronized to are both output. In addition,

an output pulse occurs on DR with the same timing

as each stop bit in the input data stream.

Mode 1

In mode 1, DR goes LOW when data is received.

From that point on, the data is read out with timing

set by an external clock input on DCLK. In this

mode, data can be read out at a different speed to the

input data rate.

Dual Tone Detection

After a conversation has been initiated (after tele-

phone is off-hook), the dialer telephone number ser-

vice information is sent by mixing two signals, 2130

and 2750 Hz, on the line inputs L1 and L2. The

SM8222A/B incorporates detectors to recover these

two signals from the conversation “noise” signal.

The two signals are recovered using two high-order

filters with center frequencies of 2130 and 2750 Hz,

respectively, in the final stage.

The SM8222A/B uses a detection circuit with time

delay built-in so that detection is maintained for an

input signal where the input level temporarily rises

above the rated value or falls below the rated value to

a level of non-detection. When the 2130 and

2750 Hz signals are simultaneously detected, EST

goes HIGH and starts charging the time constant cir-

cuit formed by an external capacitor and resistor.

When the time constant circuit voltage STGT rises

above a threshold voltage, STD goes HIGH to indi-

cate the dual tone signal has been detected. When a

dual tone signal is detected, INT also becomes active

and goes LOW.

NIPPON PRECISION CIRCUITS—11

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