SN54-74LS192 查看數據表（PDF） - Motorola => Freescale

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SN54-74LS192

PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER

Motorola => Freescale 

SN54/74LS192 • SN54/74LS193

STATE DIAGRAMS

0

1

2

3

4

15

5

14

6

13

7

12

11

10

9

8

LS192

LS192 LOGIC EQUATIONS

FOR TERMINAL COUNT

TCU = Q0 ⋅ Q3 ⋅ CPU

TCD = Q0 ⋅ Q1 ⋅ Q2 ⋅ Q3 ⋅ CPD

LS193 LOGIC EQUATIONS

FOR TERMINAL COUNT

TCU = Q0 ⋅ Q1⋅ Q2⋅ Q3 ⋅ CPU

TCD = Q0 ⋅ Q1 ⋅ Q2 ⋅ Q3 ⋅ CPD

COUNT UP

COUNT DOWN

0

1

2

3

4

15

5

14

6

13

7

12

11

10

9

8

LS193

LOGIC DIAGRAMS

P0

P1

P2

P3

PL 11

15

1

10

9

(LOAD)

CPU 5

(UP COUNT)

12 TCU

(CARRY

OUTPUT)

SD Q

T

CD Q

SD Q

T

CD Q

SD Q

T

CD Q

SD Q

T

CD Q

CPD 4

(DOWN

COUNT)

MR

14

(CLEAR)

3

Q0

VCC = PIN 16

GND = PIN 8

= PIN NUMBERS

2

6

Q1

Q2

LS192

13 TCD

(BORROW

OUTPUT)

7

Q3

FAST AND LS TTL DATA

5-2

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