UT61L5128MC-10(2002) 查看數據表（PDF） - Utron Technology Inc
零件编号
产品描述 (功能)
生产厂家
UT61L5128MC-10 Datasheet PDF : 10 Pages
| |||
UTRON
Preliminary Rev. 1.1
UT61L5128
512K X 8 BIT HIGH SPEED CMOS SRAM
CAPACITANCE (TA=25℃, f=1.0MHz)
PARAMETER
SYMBOL
MIN.
MAX.
Input Capacitance
CIN
-
8
Input/Output Capacitance
CI/O
-
10
Note : These parameters are guaranteed by device characterization, but not production tested.
UNIT
pF
pF
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0V to 3.0V
3ns
1.5V
CL=30pF, IOH/IOL=-4mA/8mA
AC ELECTRICAL CHARACTERISTICS (TA = 0℃ to 70℃)
(1) READ CYCLE
PARAMETER
UT61L5128-8
SYMBOL Vcc=3.15V~3.6V
MIN. MAX.
Read Cycle Time
tRC
Address Access Time
tAA
Chip Enable Access Time
tACE
Output Enable Access Time
tOE
Chip Enable to Output in Low Z
tCLZ*
Output Enable to Output in Low Z
tOLZ*
Chip Disable to Output in High Z
tCHZ*
Output Disable to Output in High Z
tOHZ*
Output Hold from Address Change
tOH
8
-
-
8
-
8
-
4
3
-
0
-
-
4
-
4
3
-
UT61L5128-10
Vcc=3.0V~3.6V
MIN. MAX.
10
-
-
10
-
10
-
5
3
-
0
-
-
5
-
5
3
-
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
(2) WRITE CYCLE
PARAMETER
UT61L5128-8
SYMBOL Vcc=3.15V~3.6V
MIN. MAX.
Write Cycle Time
tWC
8
-
Address Valid to End of Write
tAW
7
-
Chip Enable to End of Write
tCW
7
-
Address Set-up Time
tAS
0
-
Write Pulse Width
tWP
7
-
Write Recovery Time
tWR
0
-
Data to Write Time Overlap
tDW
5.5
-
Data Hold from End of Write Time
tDH
0
-
Output Active from End of Write
tOW*
3
-
Write to Output in High Z
tWHZ*
-
4
*These parameters are guaranteed by device characterization, but not production tested.
UT61L5128-10
Vcc=3.0V~3.6V
MIN. MAX.
10
-
8
-
8
-
0
-
8
-
0
-
6
-
0
-
3
-
-
5
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
4
P80061
Share Link: 