APW6021AKC-TUL 查看數據表（PDF） - Anpec Electronics

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APW6021AKC-TUL

Advanced PWM and Triple Linear Power Controllers

Anpec Electronics 

APW6021A

Advanced PWM and Triple Linear Power Controllers

Functional

Applications

• 4 Regulated Voltages are provided

• Microprocessor Core (1.3V to 3.5V)

• AGP Bus (1.5V or 3.3V)

• Memory (1.8V) / GTL Bus (1.5V)

• Linear Controllers Drives with both MOSFET

and Bipolar Series Pass Transistors

• Fixed or Externally Resistor-Adjustable Linear

Outputs (FIX Pin)

• Voltage-Mode PWM Control

• Fast PWM Converter Transient Response

• High-Bandwidth Error Amplifier

• Full 0% to 100% Duty Ratio

• Excellent Output Voltage Regulation

• Core PWM Output: ± 1% Over Temperature

• Other Outputs: ± 3% Over Temperature

• TTL-Compatible 5- Bit DAC Microprocessor

Core Output Voltage Selection

• Shutdown Feature Removed When All Inputs

High

• Wide Range - 1.3VDC to 3.5 VDC

• Power-Good Output Voltage Monitor

• Over-Voltage and Over-Current Fault Monitors

• Switching Regulator Does Not Require

Extra Current Sensing Element, Uses Upper

MOSFET’s r DS(ON)

• Small Converter Size

• Constant Frequency Operation

• 200kHz Free-Running Oscillator; Program-

mable From 50kHz to Over 1MHz

• Motherboard Power Regulation for Computers

General Description

The APW6021A provides the power control and pro-

tection for four output voltages in high-performance,

graphics intensive microprocessor and computer

applications. The IC integrates voltage-mode PWM

controller and three linear controllers, as well as the

monitoring and protection functions into a 28-pin SOIC

package. The synchronous-rectified buck converter

includes an Intel-compatible , TTL 5-input digital-to-

analog converter (DAC)that adjusts the core PWM

output voltage from 1.3VDC to 2.05VDC in 0.05V steps

and from 2.1VDC to 3.5VDC in 0.1V increments. the

precision reference and voltage-mode control provide

±1% static regulation. A TTL-compatible signal ap-

plied to the SELECT pin dictates which method of

control is used for the AGP bus power : a low state

results in linear control of the AGP bus to 1.5V , while

a high state transitions the output through a linearly

controlled softstart to 3.3V , followed by full enhance-

ment of the external MOSFET to pass the input

voltage. The other two linear regulators provide fixed

output voltages of 1.5V GTL bus power and 1.8V

power for the North/South Bridge core and/or cache

memory. These levels are user-adjustable by means

of an external resistor divider and pulling the FIX pin

low. All linear controllers can employ either N-Chan-

nel MOSFETs or bipolar NPNs for the pass transistor.

The APW6021A monitors all the output voltages. A

single Power Good signal is issued when the core is

within ±10% of the DAC setting and all other outputs

are above their under-voltage levels. Additional built-

in over-voltage protection for the core output uses

the lower MOSFET to prevent output voltages above

115% of the DAC setting. The PWM controller’s over-

current function monitors the output current by using

the voltage drop across the upper MOSFET’s rDS(ON) .

ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise

customers to obtain the latest version of relevant information to verify before placing orders.

Copyright  ANPEC Electronics Corp.

1

Rev. A.1 - Mar., 2001

www.anpec.com.tw

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