SN74LS157D(1999) 查看數據表（PDF） - ON Semiconductor
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SN74LS157D Datasheet PDF : 8 Pages
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SN74LS157
LOGIC DIAGRAM
I0a
2
I1a
3
I0b
5
I1b
6
I0c
14
I1c
13
I0d
11
I1d E S
10 15
1
VCC = PIN 16
GND = PIN 8
4
7
12
9
= PIN NUMBERS
Za
Zb
Zc
Zd
FUNCTIONAL DESCRIPTION
The LS157 is a Quad 2-Input Multiplexer fabricated with
the Schottky barrier diode process for high speed. It selects
four bits of data from two sources under the control of a
common Select Input (S). The Enable Input (E) is active
LOW. When E is HIGH, all of the outputs (Z) are forced
LOW regardless of all other inputs.
The LS157 is the logic implementation of a 4-pole,
2-position switch where the position of the switch is
determined by the logic levels supplied to the Select Input.
The logic equations for the outputs are:
Za = E ⋅ (I1a ⋅ S + I0a ⋅ S)
Zc = E ⋅ (I1c ⋅ S + I0c ⋅ S)
Zb = E ⋅ (I1b ⋅ S + I0b ⋅ S)
Zd = E ⋅ (I1d ⋅ S + I0d ⋅ S)
A common use of the LS157 is the moving of data from
two groups of registers to four common output busses. The
particular register from which the data comes is determined
by the state of the Select Input. A less obvious use is as a
function generator. The LS157 can generate any four of the
16 different functions of two variables with one variable
common. This is useful for implementing highly irregular
logic.
TRUTH TABLE
ENABLE
SELECT
INPUT
INPUTS
E
S
H
X
L
H
L
H
L
L
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
I0
I1
X
X
X
L
X
H
L
X
H
X
OUTPUT
Z
L
L
H
L
H
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