SN74LS165 查看數據表（PDF） - ON Semiconductor
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SN74LS165 Datasheet PDF : 8 Pages
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SN74LS165
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol
VIH
Parameter
Input HIGH Voltage
Min Typ Max Unit
Test Conditions
Guaranteed Input HIGH Voltage for
2.0
V
All Inputs
VIL
Input LOW Voltage
0.8
V
Guaranteed Input LOW Voltage for
All Inputs
VIK
VOH
VOL
Input Clamp Diode Voltage
Output HIGH Voltage
Output LOW Voltage
–0.65 –1.5
2.7
3.5
0.25 0.4
0.35 0.5
V
VCC = MIN, IIN = –18 mA
V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
V
IOL = 4.0 mA
VCC = VCC MIN,
VIN = VIL or VIH
V
IOL = 8.0 mA
per Truth Table
Input HIGH Current
Other Inputs
IIH
PL Input
Other Inputs
PL Input
20
µA VCC = MAX, VIN = 2.7 V
60
0.1
0.3
mA VCC = MAX, VIN = 7.0 V
Input LOW Current
IIL
Other Inputs
PL Input
–0.4 mA VCC = MAX, VIN = 0.4 V
–1.2
IOS
Short Circuit Current (Note 2)
–20
–100 mA
ICC
Power Supply Current
36
mA
2. Not more than one output should be shorted at a time, nor for more than 1 second.
VCC = MAX
VCC = MAX
AC CHARACTERISTICS (TA = 25°C)
Symbol
fMAX
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
Parameter
Maximum Input Clock Frequency
Propagation Delay
PL to Output
Propagation Delay
Clock to Output
Propagation Delay
P7 to Q7
Propagation Delay
P7 to Q7
Limits
Min Typ Max
25
35
22
35
22
35
27
40
28
40
14
25
21
30
21
30
16
25
Unit
MHz
ns
ns
ns
ns
Test Conditions
VCC = 5.0 V
CL = 15 pF
AC SETUP REQUIREMENTS (TA = 25°C)
Limits
Symbol
Parameter
Min Typ Max Unit
tW
CP Clock Pulse Width
25
ns
tW
PL Pulse Width
15
ns
ts
Parallel Data Setup Time
10
ns
ts
Serial Data Setup Time
20
ns
ts
CP1 to CP2 Setup Time1
30
ns
th
Hold Time
0
ns
trec
Recovery Time, PL to CP
45
ns
1The role of CP1 and CP2 in an application may be interchanged.
Test Conditions
VCC = 5.0 V
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