SN74LS298ML2 查看數據表（PDF） - ON Semiconductor

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SN74LS298ML2

Quad 2-Input Multiplexer with Storage

ON Semiconductor 

SN74LS298

CONNECTION DIAGRAM DIP (TOP VIEW)

VCC Qa Qb Qc Qd CP S I0c

16 15 14 13 12 11 10 9

NOTE:

The Flatpak version has the same

pinouts (Connection Diagram) as

the Dual In-Line Package.

1 2 3 4 56 78

I1b I1a I0a I0b I1c I1d I0d GND

PIN NAMES

S

CP

I0a – I0d

I1a – I1d

Qa – Qd

Common Select Input

Clock (Active LOW Going Edge) Input

Data Inputs from Source 0

Data Inputs from Source 1

Register Outputs

NOTES:

a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.

LOADING (Note a)

HIGH

LOW

0.5 U.L.

0.5 U.L.

0.5 U.L.

0.5 U.L.

10 U.L.

0.25 U.L.

0.25 U.L.

0.25 U.L.

0.25 U.L.

5 U.L.

LOGIC SYMBOL

3 2 4 1 9 5 76

I0a I1a I0b I1b I0c I1c I0d I1d

10 S

11 CP

Qa

Qb

Qc

Qd

15

14

13

12

VCC = PIN 16

GND = PIN 8

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