VSC8110GB 查看數據表（PDF） - Vitesse Semiconductor

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VSC8110GB

ATM/SONET/SDH 155/622 Mb/s Transceiver Mux/Demux with Integrated Clock Generation

Vitesse Semiconductor 

VITESSE

VSC8110

Data Sheet

ATM/SONET/SDH 155/622 Mb/s Transceiver

Mux/Demux with Integrated Clock Generation

Power Dissipation

Table 12: Power Supply Currents

Parameter

IMM

ITTL

PD

Description

Power supply current from VMM

Power supply current from VTTL

Power dissipation

(Max)

430

218

1.98

Units

mA

mA

W

Note: Specified with outputs open circuit. The combined maximum currents (IMM, ITTL) for any part will not exceed 1.98 Watts.

Clock Multiplier Unit

Table 13: Reference Frequency Selection and Output Frequency Control

STS12

B2

B1

1

1

1

1

0

1

1

0

0

1

0

0

0

1

1

0

0

1

0

0

0

0

0

0

Table 14: Clock Multiplier Unit Performance

Reference

Output

B0

Frequency

Frequency

[MHz]

[MHz]

0

19.44

622.08

0

38.88

622.08

1

51.84

622.08

0

77.76

622.08

0

19.44

155.52

0

38.88

155.52

1

51.84

155.52

0

77.76

155.52

Name

Description

Min

RCd

Reference clock duty cycle

40

RCj

Reference clock jitter (RMS)

OCd

Output clock duty cycle

40

OCj

Output clock jitter (RMS) @ 77.76 MHz ref

OCj

Output clock jitter (RMS) @ 51.84 MHz ref

OCj

Output clock jitter (RMS) @ 38.88 MHz ref

OCj

Output clock jitter (RMS) @ 19.44 MHz ref

OCfmin

Minimum output frequency

OCfmax Maximum output frequency

Note: Jitter specification is defined utilizing a 12KHz - 5MHz LP-HP single pole filter.

Typ

Max

60

5

60

8

10

13

15

620

624

Units

%

ps

%

ps

ps

ps

ps

MHz

MHz

G51011-0, Rev. 1.5

® VITESSE Semiconductor Corporation

Page 11

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