VSC8110
VITESSE
ATM/SONET/SDH 155/622 Mb/s Transceiver
Mux/Demux with Integrated Clock Generation
AC Timing Characteristics
Figure 1: Receive Data and Clock Block Diagram
Data Sheet
RxDATAIN +
RxDATAIN -
RxCLKIN +
RxCLKIN -
VSC8110
DQ
CLK
QD
CLK
CMU
8
TXIN<7:0>
TXLSCKIN
TXLSCKOUT
PM5355
QD
CLK
Figure 2: Receive High Speed Data Input Timing Diagram
RxCLKIN +
RxCLKIN -
RxDATAIN +
RxDATAIN -
TRXCLK
TRXSU TRXH
Page 4
® VITESSE Semiconductor Corporation
G51011-0, Rev. 1.5