SPCA514A 查看數據表（PDF） - Unspecified

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SPCA514A

Digital Audio USB Controller

Unspecified 

SPCA514A

be generated in the FIFO mode. The ECC generated by hardware can be read from the

registers (3 bytes for 256 bytes/page and 6 bytes for 512 bytes/page). The read/write

operation sequence is described as follows.

 set the flash memory chip enable

 set the flash memory command enable (0X8400)

 write command to the flash memory via the flash memory data register (0X8400)

 clear the flash memory command enable

 set the flash memory address enable

 write address to the flash memory via the flash memory data register (0X8400)

 clear the flash memory address enable

 wait the flash memory ready

Direct mode:

 read/write data from/to the flash memory via the flash memory data register (0X8400)

 read/write additional data from/to the flash memory via the flash memory data register

(0X8400)

FIFO mode:

9. read/write data from/to the flash memory via the post buffer data register (0X8300)

10. read the ECC generated by hardware from the ECC registers

11. read/write additional data from/to the flash memory via the flash memory register

(0X8400)

Pseudo DMA mode:

9. read the post buffer and write to the flash memory or read the flash memory and write to

the post buffer via the post buffer data register (0X8300)

10. read the ECC generated by hardware from the ECC registers

 read/write additional data from/to the flash memory via the flash memory register

(0X8400)

P.S.

1. The additional data means the data stored in the last 8 or 16 bytes of a page in the flash

memory. The size is 8 or 16 bytes based on that the page size is 256/512 bytes.

 

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