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SPT7851 查看數據表(PDF) - Cadeka Microcircuits LLC.

零件编号
产品描述 (功能)
生产厂家
SPT7851
CADEKA
Cadeka Microcircuits LLC. CADEKA
SPT7851 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
SPT7851
DATA SHEET
Electrical Specifications
(TA = TMIN–TMAX, VDD1 = VDD2 = VDD3 = 3.3V, VREF– = 1.0V, VREF+ = 2.0V, Common Mode Voltage = 1.65V, ƒCLK = 20 MSPS,
Bias1 = 90µA, Bias2 = 9.5µA, Differential Input, Duty Cycle = 50%; unless otherwise noted)
Parameter
Digital Inputs
Logic 1 Voltage
Logic 0 Voltage
Maximum Input Current Low
Maximum Input Current High
Input Capacitance
Digital Outputs
Logic 1 Voltage
Logic 0 Voltage
CLK to Output Delay Time (tD)
Power Supply Requirements
Supply Voltage (VDD1, VDD2, VDD3)
Supply Current (IDD)
Power Dissipation
Power Supply Rejection Ratio
Conditions
VIN = GND
VIN = VDD
IO = -2mA
IO = +2mA
Test Level Min Typ Max Units
VI
80%
VDD
VI
VI
20%
VDD
±1 µA
VI
±1 µA
V
1.8
pF
VI
85% 90%
V
VDD VDD
VI
0.1 0.4 V
IV
4 8 12 ns
IV
2.8 3.3 3.6 V
VI
24 30 mA
VI
79 100 mW
V
67
dB
TEST LEVEL CODES
All electrical characteristics are subject to the following conditions:
All parameters having min/max specifications are guaranteed. The Test Level column indicates the specific device testing
actually performed during production and Quality Assurance inspection.
LEVEL
IV
V
VI
TEST PROCEDURE
Parameter is guaranteed (but not tested) by design or characterization data.
Parameter is a typical value for information purposes only.
100% production tested at TA = +25°C. Parameter is guaranteed over specified temperature range.
Absolute Maximum Ratings (beyond which the device may be damaged)
Parameter
Supply Voltages
VDD1, VDD2,VDD3
Input Voltages
Analog and Digital Input
VREF+, VREF–, CLK
Operating Temperature Range
Storage Temperature Range
Min
Max
-0.5
+6
-0.5
VDD +0.5
-0.5
VDD +0.5
-40
+85
-65
+125
Note:
1. Operation at any Absolute Maximum Rating is not implied.
See Electrical Specifications for proper nominal applied conditions in typical applications.
Units
V
V
V
°C
°C
REV. 1B October 2003
3

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