ÎÎÎÎSÎÎÎÎWIÎÎÎÎTCHÎÎÎÎINGÎÎÎÎCHÎÎÎÎARÎÎÎÎACÎÎÎÎTERÎÎÎÎISTÎÎÎÎICSÎÎÎÎ* (CÎÎÎÎL=5ÎÎÎÎ0pFÎÎÎÎ,TAÎÎÎÎ=2ÎÎÎÎ5_CÎÎÎÎ,SeeÎÎÎÎFigÎÎÎÎure2ÎÎÎÎ) ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎAlÎÎÎÎlTypÎÎÎÎes ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Characteristic
Output Rise and Fall Time
tTLH, tTHL = (1.5 ns/pF) CL + 25 ns
tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns
tTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns
Propagation Delay Time
Clock to Q
tPLH, tPHL = (1.7 ns/pF) CL + 230 ns
tPLH, tPHL = (0.66 ns/pF) CL + 97 ns
tPLH, tPHL = (0.5 ns/pF) CL + 75 ns
Symbol
tTLH,
tTHL
tPLH,
tPHL
VDD
5.0
10
15
5.0
10
15
Min
Typ #
Max
Unit
ns
—
100
200
—
50
100
—
40
80
ns
—
315
630
—
130
260
—
100
200
Clock to Carry Out
tPLH, tPHL = (1.7 ns/pF) CL + 230 ns
tPLH, tPHL = (0.66 ns/pF) CL + 97 ns
tPLH, tPHL = (0.5 ns/pF) CL + 75 ns
tPLH,
ns
tPHL
5.0
—
315
630
10
—
130
260
15
—
100
200
Carry In to Carry Out
tPLH, tPHL = (1.7 ns/pF) CL + 230 ns
tPLH, tPHL = (0.66 ns/pF) CL + 47 ns
tPLH, tPHL = (0.5 ns/pF) CL + 35 ns
tPLH,
ns
tPHL
5.0
—
180
360
10
—
80
160
15
—
60
120
Preset or Reset to Q
tPLH, tPHL = (1.7 ns/pF) CL + 230 ns
tPLH, tPHL = (0.66 ns/pF) CL + 97 ns
tPLH, tPHL = (0.5 ns/pF) CL + 75 ns
Preset or Reset to Carry Out
tPLH, tPHL = (1.7 ns/pF) CL + 465 ns
tPLH, tPHL = (0.66 ns/pF) CL + 192 ns
tPLH, tPHL = (0.5 ns/pF) CL + 125 ns
Reset Pulse Width
tPLH,
tPHL
tPLH,
tPHL
tw(H)
ns
5.0
—
315
630
10
—
130
260
15
—
100
200
ns
5.0
—
550
1100
10
—
225
450
15
—
150
300
5.0
360
180
10
210
105
15
160
80
—
ns
—
—
Clock Pulse Width
tw(H)
5.0
350
200
10
170
100
15
140
75
—
ns
—
—
Clock Pulse Frequency
fcl
5.0
—
3.0
1.5
MHz
10
—
6.0
3.0
15
—
8.0
4.0
Preset or Reset Removal Time
The Preset or Reset Signal must be low prior to a
positive–going transition of the clock.
trem
5.0
650
325
10
230
115
15
180
90
—
ns
—
—
Clock Rise and Fall Time
tTLH,
5.0
—
—
15
µs
tTHL
10
—
—
5
15
—
—
4
Setup Time
Carry In to Clock
tsu
5.0
260
130
—
ns
10
120
60
—
15
100
50
—
Hold Time
Clock to Carry In
th
5.0
0
– 50
—
ns
10
10
– 15
—
15
10
–5
—
Setup Time
Up/Down to Clock
tsu
5.0
500
250
—
ns
10
200
100
—
15
175
75
—
Hold Time
Clock to Up/Down
th
5.0
– 70
– 140
—
ns
10
– 30
– 80
—
15
– 20
– 50
—
Setup Time
Pn to PE
tsu
5.0
– 50
– 100
—
ns
10
– 30
– 65
—
15
– 25
– 55
—
Hold Time
PE to Pn
th
5.0
480
240
—
ns
10
410
205
—
15
410
205
—
Preset Enable Pulse Width
tWH
5.0
200
100
—
ns
10
100
50
—
15
80
40
—
* The formulas given are for the typical characteristics only at 25_C.
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
MOTOROLA CMOS LOGIC DATA
MC14510B
353