SST48CF008 查看數據表（PDF） - Silicon Storage Technology

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SST48CF008

CompactFlash Card

Silicon Storage Technology 

CompactFlash Card

SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256

Data Sheet

1.0 GENERAL DESCRIPTION

The SST’s CompactFlash card contains a controller,

embedded firmware storage and flash media in a match-

book sized package with a 50-pin connector consisting of

two rows of 25 female contacts each on 50 mil (1.27 mm)

centers. Refer to Figure 1 for SST’s CompactFlash card

block diagram. The controller interfaces with the host sys-

tem allowing data to be written to and read from the flash

media.

1.1 Performance-optimized ATA Controller

The heart of a CompactFlash card is the ATA controller

which translates standard IDE/ATA signals into flash media

data and controls. SST’s CompactFlash card contains a

proprietary ATA controller that was specifically designed to

attain high data throughput from host to flash. The following

components contribute to the ATA controller’s performance.

1.1.3 Power Management Unit (PMU)

Power Management Unit controls the power consumption

of the CompactFlash card. The PMU dramatically extends

product battery life by putting the part of the circuitry that is

not in operation into sleep mode.

1.1.4 SRAM Buffer

A key contributor to the ATA controller performance is a

SRAM buffer. The buffer optimizes host’s data writes to

flash media.

1.1.5 Embedded Flash File System

Embedded Flash File System is an integral part of the

SST’s ATM controller. It contains MCU firmware that per-

forms the following tasks:

1. Translates host side signals into flash media

Writes and Reads.

1.1.1 Microcontroller Unit (MCU)

The MCU translates IDE/ATA commands into data and

control signals required for flash memory operation.

1.1.2 Internal Direct Memory Access (DMA) Control

The ATA controller inside SST’s CompactFlash card uses

DMA allowing instant data transfer to memory. This imple-

mentation eliminates controller overhead associated with

traditional, firmware based, memory control, increasing

data transfer rate.

2. Provides flash media wear leveling to spread the

flash writes across all the memory address space

to increase the longevity of flash media.

3. Keeps track of data file structures.

1.1.6 Error Correction Code (ECC)

The ATA Controller contains ECC algorithm that corrects

3 bytes of error per 512 Byte sector.

ATA Controller

To

Host

Embedded

Flash

File System

SRAM Buffer

MCU

ECC

Internal

DMA

Flash

Media

PMU

FIGURE 1: SST COMPACTFLASH BLOCK DIAGRAM

©2001 Silicon Storage Technology, Inc.

5

375 ILL1-1.4

S71125-03-000 9/01 375

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