ST52T410 查看數據表（PDF） - STMicroelectronics
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ST52T410 Datasheet PDF : 84 Pages
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ST52T410/T420/E420
When this phase starts, the ST52T410/ST52x420
core are set to RESET status; then 12V are applied
to the Vpp pin in order to start EPROM
programming. A signal applied to PB1 is used to
increment the memory address; the data is
supplied to PORT A (see EPROM programming for
further details).
1.2.2 Working mode.
Below are the control signals of this mode:
RESET
VDD
TEST
VSS
VPP
VSS
The processor starts the working phase following
the instructions, which have been previously
loaded in the memory.
ST52T410/ST52x420’s internal structure includes
a computational block, CONTROL UNIT (CU) /
DATA PROCESSING UNIT (DPU), which allows
Figure 1.1 ST52x420 SO28 Pin Configuration
processing of boolean functions and fuzzy
algorithms.
The CU/DPU can manage up to 334 different
Membership Functions for the fuzzy rules
antecedent part. The rule consequents are “crisp”
values (real numbers). The maximum number of
rules that can be defined is limited by the
dimensions of the implemented standard
algorithm.
EPROM is then shared between fuzzy and
standard algorithms. The Membership Function
data is stored inside the first 1024 memory
locations. The Fuzzy rules are parts of the program
instructions.
The Control Unit (CU) reads the information and
the status deriving from the peripherals.
Arithmetic calculus can be performed on these
values by using the internal CU and the 128 bytes
of RAM, which supports all computations. The
peripheral input can be fuzzy and/or arithmetic
output, or the values contained in Data RAM and
EPROM locations.
RESET
1
OSCOUT
2
OSCIN
3
TEST
4
INT/PC0
5
T0OUT/PC1
6
T1OUT/PC2
7
T2OUT/PC3
8
Ain0/PB0
9
Ain1/PB1
10
Ain2/PB2
11
Ain3/PB3
12
VDDA
13
GNDA
14
SO28
28
VDD
27
VSS
26
VPP
25
PA0/T0RES
24
PA1/T0OUT
23
PA2/T1OUT
22
PA3/T2OUT
21
PA4/T0STRT
20
PA5/T0CLK
19
PA6
18
PA7/PB7/Ain7
17
PB6/Ain6
16
PB5/Ain5
15
PB4/Ain4
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