ST6253B 查看數據表（PDF） - STMicroelectronics

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ST6253B

8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, AUTO-RELOAD TIMER, EEPROM AND SPI

STMicroelectronics 

ST62T53B/T60B/T63B ST62E60B

1.2 PIN DESCRIPTIONS

VDD and VSS. Power is supplied to the MCU via

these two pins. VDD is the power connection and

VSS is the ground connection.

OSCin and OSCout. These pins are internally

connected to the on-chip oscillator circuit. A quartz

crystal, a ceramic resonator or an external clock

signal can be connected between these two pins.

The OSCin pin is the input pin, the OSCout pin is

the output pin.

RESET. The active-low RESET pin is used to re-

start the microcontroller.

TEST/VPP. The TEST must be held at VSS for nor-

mal operation. If TEST pin is connected to a

+12.5V level during the reset phase, the EPROM/

OTP programming Mode is entered.

NMI. The NMI pin provides the capability for asyn-

chronous interruption, by applying an external non

maskable interrupt to the MCU. The NMI input is

falling edge sensitive.It is provided with an on-chip

pullup resistor and Schmitt trigger characteristics.

PA0-PA3. These 4 lines are organized as one I/O

port (A). Each line may be configured under soft-

ware control as inputs with or without internal pull-

up resistors, interrupt generating inputs with pull-

up resistors, open-drain or push-pull outputs, ana-

log inputs for the A/D converter.

PB0-PB3. These 4 lines are organized as one I/O

port (B). Each line may be configured under soft-

ware control as inputs with or without internal pull-

up resistors, interrupt generating inputs with pull-

up resistors, open-drain or push-pull outputs.

PB0-PB3 can also sink 20mA for direct LED

driving.

PB6/ARTIMin, PB7/ARTIMout. These pins are ei-

ther Port B I/O bits or the Input and Output pins of

the AR TIMER. To be used as timer input function

PB6 has to be programmed as input with or with-

out pull-up. A dedicated bit in the AR TIMER Mode

Control Register sets PB7 as timer output function.

PB6-PB7 can also sink 20mA for direct LED driv-

ing.

PC2-PC4. These 3 lines are organized as one I/O

port (C). Each line may be configured under soft-

ware control as input with or without internal pull-

up resistor, interrupt generating input with pull-up

resistor, analog input for the A/D converter, open-

drain or push-pull output.

PC2-PC4 can also be used as respectively Data

in, Data out and Clock I/O pins for the on-chip SPI

to carry the synchronous serial I/O signals.

Figure 2. ST62T53/T60B/T63B/E60B Pin

Configuration

PB0 1

PB1 2

VPP/TEST 3

PB2 4

PB3 5

ARTIMin/PB6 6

ARTIMout/PB7 7

Ain/PA0 8

VDD 9

VSS 10

20 PC2 / Sin / Ain

19 PC3 / Sout / Ain

18 PC4 / Sck / Ain

17 NMI

16 RESET

15 OSCout

14 OSCin

13 PA3/Ain

12 PA2/Ain

11 PA1/Ain

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