ST72F521R9T3 查看數據表（PDF） - STMicroelectronics

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ST72F521R9T3

80/64-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC, FIVE TIMERS, SPI, SCI, I2C, CAN INTERFACE

STMicroelectronics 

ST72F521, ST72521B

1 INTRODUCTION

The ST72F521 and ST72521B devices are mem-

bers of the ST7 microcontroller family designed for

mid-range applications with a CAN bus interface

(Controller Area Network).

All devices are based on a common industry-

standard 8-bit core, featuring an enhanced instruc-

tion set and are available with FLASH or ROM pro-

gram memory.

Under software control, all devices can be placed

in WAIT, SLOW, ACTIVE-HALT or HALT mode,

Figure 1. Device Block Diagram

reducing power consumption when the application

is in idle or stand-by state.

The enhanced instruction set and addressing

modes of the ST7 offer both power and flexibility to

software developers, enabling the design of highly

efficient and compact application code. In addition

to standard 8-bit data management, all ST7 micro-

controllers feature true bit manipulation, 8x8 un-

signed multiplication and indirect addressing

modes.

Related Documentation

AN1131: Migrating applications from ST72511/

311/314 to ST72521/321/324

RESET

VPP

TLI

VSS

VDD

EVD

OSC1

OSC2

PF7:0

(8-bits)

PE7:0

(8-bits)

PD7:0

(8-bits)

VAREF

VSSA

8-BIT CORE

ALU

CONTROL

LVD

AVD

OSC

MCC/RTC/BEEP

PORT F

TIMER A

BEEP

PORT E

CAN

SCI

PORT D

10-BIT ADC

PROGRAM

MEMORY

(32K - 60K Bytes)

RAM

(1024-2048 Bytes)

WATCHDOG

I2C

PORT A

PORT B

PWM ART

PORT C

TIMER B

SPI

PORT G1

PORT H1

PA7:0

(8-bits)

PB7:0

(8-bits)

PC7:0

(8-bits)

PG7:0

(8-bits)

PH7:0

(8-bits)

1On some devices only, see Device Summary on page 1

7/215

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