ST7282 查看數據表（PDF） - STMicroelectronics
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ST7282 Datasheet PDF : 23 Pages
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ST7282A5 - ST7282B5 - ROM FROM EPROM
PARAMETER
SYMBOL
CONDITION
MIN
TYP
MAX
UNIT
I/O PORTS:
Input leakage current 7)
Input leakage current
Input voltage high
Input voltage low
Output voltage high
(PA,PB,PC)
Output voltage high
(PD, PE, PF, PG, PH)
Output voltage low
(PA, PB, PC, PD, PE, PF, PG,
PH)
Output voltage slope
Output current slope
Noise amplitude
Pullup Resistor Current
IIL
IIH
VIH
VIL
VOH
VOH
VOH
VOH
VOL
VOL
dVO/dt
dIO/dt
VN
IRPU
V=VSS
V=VDD
leading edge
trailing edge
I=5mA, VDD=4.5V
I=1.0mA, VDD=4.5V
I=2.5mA, VDD=4.5V
I=0.5mA, VDD=4.5V
I=-5mA, VDD=4.5V
I=-1.6mA, VDD=4.5V
CL=50pF
CL=50pF
20MHz-250MHz
VIN=VSS
-
-
-
-
0.7VDD -
-
-
3.0
-
4.1
-
3.0
-
4.1
-
-
-
-
-
-
0.25
-
2.5
-
100
-
-
-
50
10
µA
10
µA
-
V
0.2VDD V
-
V
-
V
-
V
-
V
1.0
V
0.4
V
-
V/ns
-
mA/ns
-
µV
-
-
-
µA
ADC:
Resolution
VA1
Total Error
Conversion time
tcon
Input capacitance
Analog source impedance
RVA
Osc. frequency range
fOSC=8.55MHz 8)
fOSC=8.55MHz 8)
fOSC=8.55MHz
-
-
-
+2
34
35
-
5
-
30
8.55 -
bit
LSB
µs
pF
KΩ
MHz
LCD DRIVER:
Frame frequency
DC offset voltage 9)
COM output voltage high
COM output voltage low
SEG output voltage high
SEG output voltage low
fF
VOS
VOH
VOL
VOH
VOL
fOSC=8.55MHz
VLCD=VDD, no load
I=50µA
I=50µA
I=25µA
I=25µA
-
132
Hz
-
50
mV
-
-
V
-
0.5
V
-
-
V
-
0.5
V
EEPROM:
Write time
tW
VDD=4.5V
-
10
ms
1)Operation below 30 KHz Mis possible but requires increased supply current
2)Time to build up the oscillation amplitude to 90% VDD
3)Pull-up resistor
4)WD not active
5)WD generating a reset
6)Period for which VDD has to be disconnected or at OV to allow internal reset function at next power
up
7)pull up off
Family
ST7
Issuer Ref.
PG-RO
Chrono
97115
7282A5B5
March 26, 1997
Previous Ref
Edition
Target C
Page 5/23
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