ST8016 查看數據表（PDF） - Sitronix Technology Co., Ltd.
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ST8016 Datasheet PDF : 28 Pages
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ST8016
Dual mode data input pin
Ÿ According to the data shift direction of the data shift register, data can be input starting from
the 81st bit.
DI7
When the chip is used in dual mode, DI7 will be pulled down.
When the chip is used in single mode, DI7 won't be pulled down(Connect to VSS or VDD,
avoiding floating.).
Ÿ Refer to "RELATIONSHIP BETWEEN THE DISPLAY DATA AND LCD DRIVE OUTPUT
PINS" in Functional Operations.
S/C
Segment mode/common mode selection pin
Ÿ When set to VSS level "L", common mode is set.
DI6-DI0
Not used
Ÿ Connect DI6-DI0 to VSS or VDD, avoiding floating.
XCK
Not used
Ÿ XCK is pulled down in common mode, so connect to VSS or open.
OPTION_VDD
Option selection pin
Ÿ For COG layout to reduce interface pin.
Y1 -Y160
LCD drive output pins
Ÿ Corresponding directly to each bit of the shift register, one level (V0, V12, V43, or VSS) is
selected and output.
Ÿ Table of truth-values is shown in "TRUTH TABLE" in Functional Operations.
8.2 Functional Operations
8.2.1 Truth Table
(Segment Mode)
FR
LATCH DATA
/DISPOFF
LCD DRIVE OUTPUT VOLTAGE LEVEL (Y1-Y160)
L
L
H
V43
L
H
H
VSS
H
L
H
V12
H
H
H
V0
X
X
L
VSS
(Common Mode)
FR
LATCH DATA
/DISPOFF
LCD DRIVE OUTPUT VOLTAGE LEVEL (Y1-Y160)
L
L
H
V43
L
H
H
V0
H
L
H
V12
H
H
H
VSS
X
X
L
VSS
NOTES:
Ÿ VSS < V43 < V12 < V0
Ÿ L : VSS (0 V), H : VDD (+2.5 to +5.5 V), X : Don't care
Ÿ "Don't care" should be fixed to "H" or "L", avoiding floating.
There are two kinds of power supply (logic level voltage and LCD drive voltage) for the LCD driver.
Supply regular voltage that is assigned by specification for each power pin.
Ver 2.0
Page 9/28
2008/05/07
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