STG3680QTR(2004) 查看數據表（PDF） - STMicroelectronics

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STG3680QTR
(Rev.:2004)

LOW VOLTAGE 0.5/0.8Ω MAX DUAL SPDT SWITCH WITH BREAK BEFORE MAKE FEATURE

STMicroelectronics 

STG3680

LOW VOLTAGE 0.5/0.8Ω MAX DUAL SPDT SWITCH

WITH BREAK BEFORE MAKE FEATURE

s HIGH SPEED:

tPD = 0.3ns (TYP.) at VCC = 3.0V

tPD = 0.4ns (TYP.) at VCC = 2.3V

s ULTRA LOW POWER DISSIPATION:

ICC = 0.2µA (MAX.) at TA = 85°C

s LOW "ON" RESISTANCE VIN = 0V:

RON-S1 = 0.5Ω (MAX. TA = 25°C) at VCC=2.7V

RON-S2 = 0.8Ω (MAX. TA = 25°C) at VCC=2.7V

s WIDE OPERATING VOLTAGE RANGE:

VCC (OPR) = 1.65V to 4.3V SINGLE SUPPLY

s 4.3V TOLERANT AND 1.8V COMPATIBLE

THRESHOLD ON DIGITAL CONTROL INPUT

at VCC = 2.3 to 3.0V

s LATCH-UP PERFORMANCE EXCEEDS

300mA (JESD 17)

DESCRIPTION

The STG3680 is an high-speed CMOS DUAL

ANALOG S.P.D.T. (Single Pole Dual Throw)

SWITCH or DUAL 2:1 Multiplexer/Demultiplexer

Bus Switch fabricated in silicon gate C2MOS

technology. It is designed to operate from 1.65V to

4.3V, making this device ideal for portable

applications.

It offers very low ON-Resistance (<0.5Ω 1S1 and

2S1 channels; <0.8Ω 1S2 and 2S2 channels) at

VCC=2.7V. The nIN inputs are provided to control

the switches. The switches nS1 are ON (they are

QFN

ORDER CODES

PACKAGE

QFN

T&R

STG3680QTR

connected to common Ports Dn) when the nIN

input is held high and OFF (high impedance state

exists between the two ports) when nIN is held

low; the switches nS2 are ON (they are connected

to common Ports Dn) when the nIN input is held

low and OFF (high impedance state exists

between the two ports) when IN is held high.

Additional key features are fast switching speed,

Break Before Make Delay Time and Ultra Low

Power Consumption. All inputs and outputs are

equipped with protection circuits against static

discharge, giving them ESD immunity and

transient excess voltage. It’s available in the

commercial temperature range in the QFN

package.

PIN CONNECTION

May 2004

Rev. 3

1/11

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