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STK14CA8 查看數據表(PDF) - Simtek Corporation

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STK14CA8 Datasheet PDF : 17 Pages
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STK14CA8
HARDWARE STORE CYCLE
SYMBOLS
NO.
Standard Alternate
PARAMETER
STK14CA8
MIN
MAX
31
tDELAY
tHLQZ
Time Allowed to Complete SRAM Cycle
1
32
tHLHX
Hardware STORE Pulse Width
15
33
tHLBL
Hardware STORE Low to STORE Busy
300
Notes
n: Read and Write cycles in progress before HSB is asserted are given this amount of time to complete.
HARDWARE STORE CYCLE
32
tHLHX
HSB (IN)
HSB (OUT)
33
tHLBL
HIGH IMPEDENCE
23
tSTORE
DQ (DATA OUT)
31
tDELAY
DATA VALID
UNITS
µs
ns
ns
NOTES
n
HIGH IMPEDENCE
DATA VALID
Soft Sequence Commands
SYMBOLS
NO.
Standard
PARAMETER
STK14CA8
MIN
MAX
UNITS
NOTES
34
Notes
tSS
Soft Sequence Processing Time
70
µs
o,p
o: This is the amount of time that it takes to take action on a soft sequence command. Vcc power must remain high to effectively register command.
p: Commands like Store and Recall lock out I/O until operation is complete which further increases this time. See specific command.
ADDRESS
Vcc
34
tSS
Soft Sequence Command
ADDRESS #1
ADDRESS #6
34
tSS
Soft Sequence Command
ADDRESS #1
ADDRESS #6
December 2005
9
Document Control #ML0022 rev 1.3

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