STK14CA8 查看數據表（PDF） - Unspecified
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STK14CA8 Datasheet PDF : 15 Pages
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STK14CA8
PACKAGES
VCAP 1
48
A16 2
47
A14 3
46
A12 4
45
A7 5
44
A6 6
43
A5 7
42
8
41
A4 9
40
10
39
11
38
12
37
VSS 13
36
14
35
15
34
DQ0 16
33
A3 17
32
A2 18
31
A1 19
30
A0 20
29
DQ1 21
28
DQ2 22
27
23
26
24
25
48 Pin SSOP
VCC
A15
HSB
W
A13
A8
A9
A11
VSS
DQ6
G
A10
E
DQ7
DQ5
DQ4
DQ3
VCC
VCAP 1
32
A16 2
31
A14 3
30
A12 4
29
A7 5
28
A6 6
27
A5 7
26
A4 8
25
A3 9
24
A2 10
23
A1 11
22
A0 12
21
DQ0 13
20
DQ1 14
19
DQ2 15
18
VSS 16
17
32 Pin
SOIC or PDIP
VCC
A15
HSB
W
A13
A8
A9
A11
G
A10
E
DQ7
DQ6
DQ5
DQ4
DQ3
PIN DESCRIPTIONS
Pin Name
A16 – A0
DQ7 –DQ0
E
I/O
Input
I/O
Input
W
Input
G
Input
VCC
Power Supply
HSB
I/O
VCAP
VSS
(Blank)
Power Supply
Power Supply
No Connect
Relative PCB area usage.
See website for detailed
package size specifications.
Description
Address: The 17 address inputs select one of 131,072 bytes in the nvSRAM array.
Data: Bi-directional 8-bit data bus for accessing the nvSRAM.
Chip Enable: The active low E input selects the device.
Write Enable: The active low W enables data on the DQ pins to be written to the address location latched by
the falling edge of E .
Output Enable: The active low G input enables the data output buffers during read cycles. De-asserting G
high causes the DQ pins to tri-state.
Power 3.0V +20%, -10%
Hardware Store Busy: When low this output indicates a Hardware Store is in progress. When pulled low external
to the chip it will initiate a nonvolatile STORE operation. A weak internal pull up resistor keeps this pin high if not
connected. (Connection Optional)
Autostore Capacitor: Supplies power to nvSRAM during power loss to store data from SRAM to nonvolatile
elements.
Ground
Unlabeled pins have no internal connection.
December 2004
2
Document Control #ML0022 rev 1.0
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