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STK14CA8 查看數據表(PDF) - Cypress Semiconductor

零件编号
产品描述 (功能)
生产厂家
STK14CA8
Cypress
Cypress Semiconductor Cypress
STK14CA8 Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Pinouts
Figure 1. 48-Pin SSOP
VCAP
1
A16 2
A14 3
A12 4
A7 5
A6 6
A5 7
NC 8
A4 9
NC 10
NC 11
NC 12
VSS 13
NC 14
NC 15
DQ0 16
A3 17
A2 18
A1 19
A0 20
DQ1 21
DQ2 22
NC 23
NC 24
48 VCC
47 A15
46 HSB
45 W
44 A13
43 A8
42 A9
41 NC
40 A11
39 NC
38 NC
37 NC
36 VSS
35 NC
34 NC
33 DQ6
32 G
31 A10
30 E
29 DQ7
28 DQ5
27 DQ4
26 DQ3
25 VCC
STK14CA8
Figure 2. 32-Pin SOIC
VCAP
1
A16 2
A14 3
A12 4
A7 5
A6 6
A5 7
A4 8
A3 9
A2 10
A1 11
A0 12
DQ0 13
DQ1 14
DQ2 15
VSS 16
32 VCC
31 A15
30 HSB
29 W
28 A13
27 A8
26 A9
25 A11
24 G
23 A10
22 E
21 DQ7
20 DQ6
19 DQ5
18 DQ4
17 DQ3
Figure 3. Relative PCB Area Usage[1]
Pin Descriptions
Pin Name
A16-A0
DQ7-DQ0
E
W
G
VCC
HSB
VCAP
VSS
NC
I/O
Description
Input
Address: The 17 address inputs select one of 131,072 bytes in the nvSRAM array.
I/O
Data: Bi-directional 8-bit data bus for accessing the nvSRAM.
Input
Chip Enable: The active low E input selects the device.
Input
Write Enable: The active low W allows to write the data on the DQ pins to the address location
latched by the falling edge of E.
Input
Output Enable: The active low G input enables the data output buffers during read cycles.
De-asserting G high causes the DQ pins to tri-state.
Power Supply Power: 3.0V, +20%, -10%.
I/O
Hardware Store Busy: When low this output indicates a Store is in progress. When pulled low
external to the chip, it initiates a nonvolatile STORE operation. A weak pull up resistor keeps this
pin high if not connected. (Connection is optional).
Power Supply AutoStore™ Capacitor: Supplies power to nvSRAM during power loss to store data from SRAM to
nonvolatile storage elements.
Power Supply Ground.
No Connect Unlabeled pins have no internal connections.
Note
1. See Package Diagrams on page 15 for detailed package size specifications.
Document Number: 001-51592 Rev. **
Page 2 of 16
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