STV7618/WAF 查看數據表（PDF） - STMicroelectronics
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STV7618/WAF Datasheet PDF : 16 Pages
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STV7618
4 - DATA BUS CONFIGURATION
BS F/R Input
Data Shift
CLK 01 02 03 04 05 06 ... 11 12 13 14 15 16
A1 Out 01 07 13 19 25 31
A2 Out 02 08 14 20 26 32
A3 Out 03 09 15 21 27 33
LL
A4 Out 04 10 16 22 28 34
A5 Out 05 11 17 23 29 35
A6 Out 06 12 18 24 30 36
61 67 73 79 85 91
62 68 74 80 86 92
63
69
75
81
87
93
For-
ward
64 70 76 82 88 94 Shift
65 71 77 83 89 95
66 72 78 84 90 96
A1 Out 91 85 79 73 67 61
A2 Out 92 86 80 74 68 62
A3 Out 93 87 81 75 69 63
LH
A4 Out 94 88 82 76 70 64
A5 Out 95 89 83 77 71 65
A6 Out 96 90 84 78 72 66
31 25 19 13 07 01
32 26 20 14 08 02
33
27
21
15
09
03
Re-
verse
34 28 22 16 10 04 Shift
35 29 23 17 11 05
36 30 24 18 12 06
CLK 01 02 03 04 05 06 ... 27 28 29 30 31 32
A1 Out 01 04 07 10 13 16
H L A2 Out 02 05 08 11 14 17
A3 Out 03 06 09 12 15 18
79 82 85 88 91 94
80
83
86
89
92
95
For-
ward
81 84 87 90 93 96
A1 Out 94 91 88 85 82 79
H H A2 Out 95 92 89 86 83 80
A3 Out 96 93 90 87 84 81
16 13 10 07 04 01
17
14
11
08
05
02
Re-
verse
18 15 12 09 06 03
This table describes the position of the first data sampled by the first rising edge of the CLK signal. For the
first configuration described in the above table, (BS = “L” and F/R= “L”), data on A1 bus sampled by the
1st clock pulse is applied on Output1. After 16 clock pulses this data will be shifted to Output 91.
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