STV7622 查看數據表（PDF） - STMicroelectronics
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STV7622 Datasheet PDF : 32 Pages
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Circuit description
STV7622
5.2
3 x 64-bit data bus, standard transmission (BS1 = H, BS2 = L)
The data bus is in 3-bit mode (DB1 to DB3 active) for BS1 = H and BS2 = L.
Data on DB1 is sampled by the first clock pulse and shifted from position 1 to position 190
after 64 clock pulses. The data is then applied to output 190, on the high-to-low transition of
/STB.
Table 3. 3 x 64-bit data bus transmission
Clock pulse number
BS1 BS2 DIR Input
Position 01 02 03
…
62 63 64
DB1
OUT
01 04 07
H
L L DB2
OUT
02 05 08
DB3
OUT
03 06 09
DB1
OUT 190 187 184
H
L H DB2
OUT 191 188 185
DB3
OUT 192 189 186
184 187 190
185 188 191
186 189 192
07 04 01
08 05 02
09 06 03
Comment
Left / Right
shift
Right / Left
shift
5.3
6 x 32-bit data bus, standard transmission (BS1 = L, BS2 = L)
The data bus is in 6-bit mode (DB1 to DB6 active) for BS1 = L and BS2 = L.
Table 4 below describes how data is shifted in the register.
Table 4. 6 x 32-bit data bus transmission
Position 01 02 03
…
30 31 32
BS1 BS2 DIR Input
Clock pulse number
DB1
OUT
01 07 13
DB2
OUT
02 08 14
DB3
OUT
03 09 15
L
LL
DB4
OUT
04 10 16
DB5
OUT
05 11 17
DB6
OUT
06 12 18
175 181 187
176 182 188
177 183 189
178 184 190
179 185 191
180 186 192
DB1
OUT 187 181 175
DB2
OUT 188 182 176
DB3
OUT 189 183 177
L
LH
DB4
OUT 190 184 178
DB5
OUT 191 185 179
DB6
OUT 192 186 180
13 07 01
14 08 02
15 09 03
16 10 04
17 11 05
18 12 06
Comment
Left/Right
shift
Right/Left
shift
8/32
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