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STV8162D 查看數據表(PDF) - STMicroelectronics

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STV8162D Datasheet PDF : 12 Pages
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Power Dissipation and Layout Indications
STV8162 - STV8162D
5 Power Dissipation and Layout Indications
The power is mainly dissipated by the three device buffers. It can be calculated by the equation:
P = (VIN1-VOUT1) x IOUT1 + (VIN2-VOUT2) x IOUT2 + (VIN3-VOUT3) x IOUT3
The following table lists the different RthJA values of these packages with or without a heat sink and
the corresponding maximum power dissipation assuming:
Maximum Ambient Temperature = 70° C
Maximum Junction Temperature = 140° C
Device
STV8162
STV8162D
Heat Sink
No
Yes
No
Yes
RthJA in °C/W
50
15
56 to 40
32
PMAX in W
1.4
4.6
1.25 to 1.75
2.2
Figure 7: Thermal Resistance (Junction-to-Ambient) of DIP18 Package without Heat Sink
To optimize the thermal conductivity of the copper
60
layer and the exchanges with the air, the solder
must cover the maximum amount of this area.
55
Test Board with
50
“On Board” square heat sink area.
45
40
0
2
4
6
8
10 12
Copper area (cm²) (35 µm plus solder) Board is face-down
Figure 8: Metal plate mounted near the STV8162D for heat sinking
8/12
Top View
Bottom View

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