T4312816B 查看數據表（PDF） - Taiwan Memory Technology

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产品描述 (功能)

生产厂家

T4312816B

8M x 16 SDRAM 2M x 16bit x 4Banks Synchronous DRAM

Taiwan Memory Technology 

tm TE

CH

T4312816B

• Burst Length Field (A2~A0)

This field specifies the data length of column access using the A2~A0 pins and selects the Burst Length to be 2,

4, 8, or full page.

A2

A1

0

0

0

0

0

1

0

1

1

0

1

0

1

1

1

1

Full Page Length : 512

A0

Burst Length

0

1

1

2

0

4

1

8

0

Reserved

1

Reserved

0

Reserved

1

Full Page

• Burst Type Field (A3)

The Burst Type can be one of two modes, Interleave Mode or Sequential Mode.

A3

Burst Type

0

Sequential

1

Interleave

--- Addressing Sequence of Sequential Mode

An internal column address is performed by increasing the address from the column address which is input to

the device. The internal column address is varied by the Burst Length as shown in the following table. When

the value of column address, (n + m), in the table is larger than 255, only the least significant 8 bits are

effective.

Data n

0 1 2 3 4 5 6 7 - 255 256 257 -

Column Address n n+1 n+2 n+3 n+4 n+5 n+6 n+7 - n+255 n n+1 -

2 words:

Burst Length

4 words:

8 words:

Full Page: Column address is repeated until terminated.

--- Addressing Sequence of Interleave Mode

A column access is started in the input column address and is performed by inverting the address bits in the

sequence shown in the following table.

Data n

Data 0 A7 A6 A5 A4

Data 1 A7 A6 A5 A4

Data 2 A7 A6 A5 A4

Data 3 A7 A6 A5 A4

Data 4 A7 A6 A5 A4

Data 5 A7 A6 A5 A4

Data 6 A7 A6 A5 A4

Data 7 A7 A6 A5 A4

• CAS# Latency Field (A6~A4)

Column Address

A3 A2 A1 A0

A3 A2 A1 A0#

A3 A2 A1# A0

A3 A2 A1# A0#

A3 A2# A1 A0

A3 A2# A1 A0#

A3 A2# A1# A0

A3 A2# A1# A0#

Burst Length

4 words

8 words

TM Technology Inc. reserves the right

P. 11

to change products or specifications without notice.

Publication Date: FEB. 2007

Revision: A

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