T431616C 查看數據表（PDF） - Taiwan Memory Technology
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T431616C Datasheet PDF : 30 Pages
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tm TE
CH
T431616C
DC CHARACTERISTICS
TA = 0 to 70°C, VIH(min)/VIL(max)=2.0V/0.8V
Parameter
Speed version
Symbol
Unit
-6 -7
Test Condition
Operating Current
( One Bank Active)
ICC1
145
140
mA
Burst Length = 1
tRC≥tRC(min) ,tCC≥tCC(min),IOL= 0 mA
Precharge Standby ICC2P
Current in power-
down mode
ICC2PS
2
CKE ≤ VIL(max),tCC= tCC(min)
mA
3
CKE ≤ VIL(max),CLK ≤ VIL(max), tCC = ∞
Precharge Standby
Current in non
ICC2N
power-down mode
ICC2NS
30
2
CKE ≥ VIH(min), CS ≥ VIH(min),tCC= tCC(min)
mA Input signals are changed one time during 30ns
CKE≥VIH(min),CLK ≤ VIL(min), tCC = ∞
Input signals are stable
Active Standby ICC3P
Current in power-
down mode
ICC3PS
10
CKE ≤ VIL(max),tCC= tCC(min)
mA
10
CKE ≤ VIL(max),CLK ≤ VIL(max), tCC = ∞
Active Standby
Current in non
ICC3N
power-down mode
(One Bank Active) ICC3NS
40
30
CKE≥VIH(min), CS ≥VIH(min),tCC= tCC(min)
mA Input signals are changed one time during 30ns
CKE≥VIH(min),CLK ≤ VIL(min), tCC = ∞
Input signals are stable
Operating Current
(Burst Mode)
ICC4
150 140
CAS Latency 3 IOL=0 mA,Page Burst
mA
All Band Activated
150 140
CAS Latency 2
tCCD= tCCD(min)
Refresh Current ICC5
90
80 mA tRC ≥tRC(min)
Note
1,3
3
3
3
3
1,3
2,3
Self refresh
Current
ICC6
1
mA CKE ≤ 0.2V
Note:
1. Measured with output open. Addresses are changed only one time during tCC(min) .
2. Refresh period is 32ms. Addresses are changed only one time during tCC(min) .
3. tCC : Clock cycle time.
tRC : Row cycle time.
tCCD : Column address to column address delay time.
TM Technology Inc. reserves the right
P. 6
to change products or specifications without notice.
Publication Date: AUG. 2004
Revision: A
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