TA1270 查看數據表（PDF） - Toshiba

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TA1270

TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC

Toshiba 

PIN

No.

PIN NAME

FUNCTION

13 VP output

Vertical pulse output pin

INTERFACE

TA1270BF

INPUT / OUTPUT

SIGNAL

14 HD output

Outputs HD pulse processed by the

AFC. HD output phase or pulse width

can be changed by bus setting.

15 SCP output

Outputs sand castle pulse (SCP).

The output signals are clamp pulse,

horizontal blanking pulse, and

vertical blanking pulse.

The minimum load resistance is

3 kΩ.

16 Dig GND

Logic block GND pin

―

17 CP / HP input

Input pin for CP / HP pulse used to

operate the SW circuit.

CP is used as clamp pulse ; HP as

blanking pulse.

18 SYNC VCC

19 SW VCC

VCC pins for sync processor block

and SW block.

Connect 9 V (Typ.).

―

7.9 V

4.3 V

2.5 V

―

―

5

2002-12-24

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