TA2024B 查看數據表（PDF） - Unspecified
零件编号
产品描述 (功能)
生产厂家
TA2024B Datasheet PDF : 14 Pages
| |||
Tripath Technology, Inc. - Technical Information
APPLICATION INFORMATION
Layout Recommendations
The TA2024B is a power (high current) amplifier that operates at relatively high switching
frequencies. The outputs of the amplifier switch between the supply voltage and ground at high
speeds while driving high currents. This high-frequency digital signal is passed through an LC
low-pass filter to recover the amplified audio signal. Since the amplifier must drive the inductive
LC output filter and speaker loads, the amplifier outputs can be pulled above the supply voltage
and below ground by the energy in the output inductance. To avoid subjecting the TA2024B to
potentially damaging voltage stress, it is critical to have a good printed circuit board layout. It is
recommended that Tripath’s layout and application circuit be used for all applications and only be
deviated from after careful analysis of the effects of any changes. Please contact Tripath
Technology for further information regarding reference design material regarding the TA2024B.
Output Stage layout Considerations and Component Selection Criteria
Proper PCB layout and component selection is a major step in designing a reliable TA2024B
power amplifier. The supply pins require proper decoupling with correctly chosen components to
achieve optimal reliability. The output pins need proper protection to keep the outputs from going
below ground.
The above layout shows ideal component placement and routing for channel 1 (the same design
criteria applies to channel 2). This shows that C3, a 0.1uF surface mount 0805 capacitor, should
be the first component placed and must decouple VDD1 (pins 29 and 30) directly to PGND1
(pin35). C2, a low ESR, electrolytic capacitor, should also decouple VDD1 directly to PGND1.
Both C2 and C3 may decouple VDD1 to a ground plane, but it is critical that the return path to the
PGND1 pin of the TA2024B, whether it is a ground plane or a trace, be a short and direct low
impedance path. Effectively decoupling VDD will shunt any power supply trace length inductance.
The diodes and inductors shown are for channel 1’s outputs. D1 and L2 connect to the OUTP1
pin and D2 and L3 connect to the OUTM1 pin of the TA2024B. Each output must have a Schottky
or Ultra Fast Recovery diode placed near the TA2024B, preferably immediately after the
decoupling capacitors and use short returns to PGND1. These low side diodes, D1 and D2, will
prevent the outputs from going below ground. To be optimally effective they must have a short
and direct return path to its proper ground pin (PGND1) of the TA2024B. This can be achieved
with a ground plane or a trace.
The output inductors, L2 and L3, should be placed close to the TA2024B without compromising
the locations of the closely placed supply decoupling capacitors and output diodes. The purpose
8
TA2024B –KL/1.2/01.06
Share Link: 