87C54 查看數據表（PDF） - Intel
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87C54 Datasheet PDF : 20 Pages
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AUTOMOTIVE 87C54 87C54-20
PACKAGES
Part
Prefix
87C54
AP
87C54
AN
Package Type
40-Pin Plastic DIP
44-Pin PLCC
DIP (PDIP)
270849 – 2
Do not connect reserved pins
PAD (PLCC)
270849 – 3
Figure 3 Pin Connections
PIN DESCRIPTIONS
VCC Supply voltage
VSS Circuit ground
VSS1 Secondary ground (in PLCC only) Provided to
reduce ground bounce and improve power supply
by-passing
NOTE
This pin is not a substitute for the VSS pin (pin 22)
4
Port 0 Port 0 is an 8-bit open drain bidirectional I O
port As an output port each pin can sink several LS
TTL inputs Port 0 pins that have 1’s written to them
float and in that state can be used as high-imped-
ance inputs
Port 0 is also the multiplexed low-order address and
data bus during accesses to external Program and
Data Memory In this application it uses strong inter-
nal pullups when emitting1’s and can source and
sink several LS TTL inputs
Port 0 also receives the code bytes during EPROM
programming and outputs the code bytes during
program verification External pullup resistors are re-
quired during program verification
Port 1 Port 1 is an 8-bit bidirectional I O port with
internal pullups The Port 1 output buffers can drive
LS TTL inputs Port 1 pins that have 1’s written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 1
pins that are externally pulled low will source current
(IIL on the data sheet) because of the internal pull-
ups
In addition Port 1 serves the functions of the follow-
ing special features of the 87C54
Port Pin
P1 0
P1 1
P1 2
P1 3
P1 4
P1 5
P1 6
P1 7
Alternate Function
T2 (External Count Input to Timer
Counter 2) Clock-Out
T2EX (Timer Counter 2 Capture
Reload Trigger and Direction Control)
ECI (External Count Input to the PCA)
CEX0 (External I O for Compare
Capture Module 0)
CEX1 (External I O for Compare
Capture Module 1)
CEX2 (External I O for Compare
Capture Module 2)
CEX3 (External I O for Compare
Capture Module 3)
CEX4 (External I O for Compare
Capture Module 4)
Port 1 receives the low-order address bytes during
EPROM programming and verifying
Port 2 Port 2 is an 8-bit bidirectional I O port with
internal pullups The Port 2 output buffers can drive
LS TTL inputs Port 2 pins that have 1’s written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 2
pins that are externally pulled low will source current
(IIL on the data sheet) because of the internal pull-
ups
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