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TDA18218HN

DVB-T Silicon Tuner IC

NXP Semiconductors. 

NXP Semiconductors

TDA18218HN

DVB-T Silicon Tuner IC

It should be noted that the level control is always operating.

The strategy of the level detection has to be adapted for each type of channel decoder. It

must be defined to satisfy ADC sampling (minimum level, ADC headroom).

All AGC amplifiers are controlled independently.

8.4 Power-down mode

The TDA18218HN can be programmed in Standby mode. The following blocks are turned

off when programming a power-down:

• AGC2 and its level detector

• BP filter

• Mixer and VCO

• IF selectivity LPFc

• IF AGC

Remaining functions are:

• Loop-Through

• 16 MHz clock output (to drive a channel decoder)

• I2C-bus Core (to wake-up the IC later on)

9. Control interface

9.1 I2C-bus format, write and read mode

I2C-bus uses two pins (SDA and SCL) to transfer information between devices connected

to the bus. The SDA pin provides bidirectional data transfer. While the SCL pin provides

the timing sequences. Data can be read and written as follows:

Write mode:

• Any register can be written to using its subaddress

• Any following (contiguous) registers can be written using the subaddress of the first

register

Read mode:

• The read after Restart mode is not allowed. In addition, registers cannot be read using

the subaddress of the register. However, registers can be read as follows:

– from 00h to 16h

– from 00h to 27h

– from 00h to 3Ah

– from 00h to any register subaddress, if MSB = 1 for the next register

TDA18218HN_1

Product data sheet

Rev. 01 — 8 July 2009

© NXP B.V. 2009. All rights reserved.

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