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TDA8764 查看數據表(PDF) - Philips Electronics

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TDA8764 Datasheet PDF : 28 Pages
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Philips Semiconductors
10-bit high-speed low-power ADC with
internal reference regulator
Preliminary specification
TDA8764
SYMBOL
PARAMETER
Switching characteristics
CLOCK INPUT; CLK; see Fig.5; note 1
fclk(max)
maximum clock frequency
TDA8764TS/4; TDA8764HL/4
TDA8764TS/8; TDA8764HL/8
tCPH
clock pulse width HIGH
TDA8764TS/4; TDA8764HL/4
TDA8764TS/8; TDA8764HL/8
tCPL
clock pulse width LOW
TDA8764TS/4; TDA8764HL/4
TDA8764TS/8; TDA8764HL/8
Analog signal processing
LINEARITY
INL
integral non-linearity
TDA8764TS/4; TDA8764HL/4
TDA8764TS/8; TDA8764HL/8
DNL
differential non-linearity
TDA8764TS/4; TDA8764HL/4
TDA8764TS/8; TDA8764HL/8
Eoffset
EG
offset error
gain error (from device to device)
using internal reference voltage
BANDWIDTH (fclk = 40 MHZ)/4 VERSION;
B
analog bandwidth
tstLH
analog input settling time
LOW-to-HIGH
tstHL
analog input settling time
HIGH-to-LOW
CONDITIONS
MIN.
40
80
7
5
7
5
fclk = 40 MHz; ramp input
fclk = 80 MHz; ramp input
fclk = 40 MHz; ramp input
fclk = 80 MHz; ramp input
middle code
note 5
full-scale sine wave; note 6
75% full-scale sine wave;
note 6
small signal at mid-scale;
VI = ±10 LSB at code 512;
note 6
full-scale square wave;
see Fig.7 and note 7
full-scale square wave;
see Fig.7 and note 7
TYP. MAX. UNIT
MHz
MHz
ns
ns
ns
ns
±0.8 tbf
LSB
±0.8 tbf
LSB
±0.25 tbf
LSB
±0.25 tbf
LSB
±1
LSB
tbf
%
20
30
350
MHz
MHz
MHz
tbf
tbf
ns
tbf
tbf
ns
1999 Jan 12
10

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