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TDA9852 查看數據表(PDF) - Philips Electronics

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TDA9852 Datasheet PDF : 40 Pages
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Philips Semiconductors
I2C-bus controlled BTSC stereo/SAP
decoder and audio processor
Preliminary specification
TDA9852
FEATURES
Quasi alignment-free application due to automatic
adjustment of channel separation via I2C-bus
High integration level with automatically tuned
integrated filters
Input level adjustment I2C-bus controlled
Alignment-free SAP processing
dbx noise reduction circuit
Power supply
I2C-bus transceiver.
GENERAL DESCRIPTION
The TDA9852 is a bipolar-integrated BTSC stereo
decoder with hi-fi audio processor (I2C-bus controlled) for
application in TV sets, VCRs and multimedia.
Stereo decoder
Stereo pilot PLL circuit with ceramic resonator,
automatic adjustment procedure for stereo channel
separation, two pilot thresholds selectable via I2C-bus.
Audio processor
Selector for internal and external signals (line in)
Automatic volume level control
(control range +6 to 15 dB)
Interface for external noise reduction circuits
Volume control (control range +16 to 71 dB)
Special loudness characteristic automatically controlled
in combination with volume setting (control range 28 dB)
Audio signal zero crossing detection between any
volume step switching
Mute control at audio signal zero crossing
Mute control via I2C-bus.
ORDERING INFORMATION
TYPE
NUMBER NAME
PACKAGE
DESCRIPTION
VERSION
TDA9852 SDIP42 plastic shrink dual in-line package; 42 leads (600 mil)
SOT270-1
TDA9852H QFP44 plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 × 10 × 1.75 mm SOT307-2
1997 Mar 11
2

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