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ICL7650CPA 查看數據表(PDF) - Linear Technology

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ICL7650CPA
Linear
Linear Technology Linear
ICL7650CPA Datasheet PDF : 24 Pages
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U
THEORY OF OPERATIO
LTC1052/LTC7652
power supply are also nulled. For nulling to take place, the
offset voltage, common mode voltage and power supply
must not change at a frequency which is high compared to
the frequency response of the nulling loop.
AC OPERATION AND ALIASING ERRORS
So far, the DC performance of the LTC1052 has been
explained. As the input signal frequency increases, the
problem of aliasing must be addressed. Aliasing is the
spurious formation of low and high frequency signals
caused by the mixing of the input signal with the sampling
frequency, fS. The frequency of the error signals, fE, is:
fE = fS ±fI
where fI = input signal frequency.
Normally it is the difference frequency (fS – fI ) which is of
concern because the high frequency (fS + fI) can be easily
filtered. As the input frequency approaches the sampling
frequency, the difference frequency approaches zero and
will cause DC errors—the exact problem that the zero-drift
amplifier is meant to eliminate.
The solution is simple; filter the input so the sampling loop
never sees any frequency near the sampling frequency.
At a frequency well below the sampling frequency, the
LTC1052 forces I1 to equal I2 (see Figure 1b). This makes
δ l zero, thus the gain of the sampling loop zero at this and
higher frequencies (i.e., a low pass filter). The corner
frequency of this low pass filter is set by the output stage
pole (1/RL4 gm5 RL5 C2).
For frequencies above this pole, I2 is:
I2 = VIN gm6
1
SC2
• SC1
and
I1 – I2 = VIN gm1 – VIN gm6
C1
C2
The LTC1052 is very carefully designed so that gm1 = gm6
and C1 = C2. Substituting these values in the above equa-
tion shows I1 – I2 = 0.
The gm6 input stage, with Cl and C2, not only filters the
input to the sampling loop, but also acts as a high
frequency path to give the LTC1052 good high frequency
response. The unity-gain cross frequencies for both the
DC path and high frequency path are identical
[f3dB =
1
2π
(gm1/C1) =
1
2π
(gm6/C2)]
thereby making the frequency response smooth and con-
tinuous while eliminating sampling noise in the output as
the loop transitions from the high gain DC loop to the high
frequency loop.
The typical curves show just how well the amplifier works.
The output spectrum shows that the difference frequency
(fI–fS = 100Hz) is down by 80dB and the frequency
response curve shows no abnormalities or perturbations.
Also note the well-behaved small and large-signal step
responses and the absence of the sampling frequency in
the output spectrum. If the dynamics of the amplifier
(i.e., slew rate and overshoot), depend on the sampling
clock, the sampling frequency will appear in the output
spectrum.
C1
S3
VREF
C2
+ IN
S1
– IN
+
gm1
+–
RL1
gm2
gm3
S2
RL2
VNULL
CEXT B
CEXT A
gm4
+–
+
gm5
RL4
VOUT
RL5
gm6
+
V–
Figure 1a. LTC1052 Block Diagram
Auto Zero Cycle
LTC1052/7652 • TPC13
1052fa
7

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