AD7769 查看數據表（PDF） - Analog Devices

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AD7769

LC2MOS Analog I/O Port

Analog Devices 

AD7769–SPECIFICATIONS

ADC SPECIFICATIONS (VDD = +12 V ؎ 10%; VCC = +5 V ؎ 5%; AGND [ADC] = AGND [DAC] = DGND = 0 V; VBIAS [ADC] = +5 V;

VSWING [ADC] = +2.5 V; fCLK = 5 MHz external. All specifications TMIN to TMAX1 unless otherwise noted.)

Parameter

J Version A Version Units

Conditions/Comments

DC ACCURACY

Resolution

8

*

Relative Accuracy

±1

*

Differential Nonlinearity

±1

*

Bias Offset Error

+25°C

± 2.5

*

TMIN to TMAX

Bias Offset Match

± 3.0

*

+25°C

± 2.5

*

TMIN to TMAX

± 3.5

*

Plus or Minus Full-Scale Error

+25°C

± 2.0

*

TMIN to TMAX

± 2.5

*

Plus or Minus Full-Scale Match

+25°C

± 3.5

*

TMIN to TMAX

±4

*

ADC TO DAC MATCHING

Bias Offset Match

+25°C

± 2.5

*

TMIN to TMAX

± 3.5

*

Plus or Minus Full-Scale Match

+25°C

± 3.5

*

TMIN to TMAX

± 4.0

*

DYNAMIC PERFORMANCE2

Signal-to-Noise Ratio (SNR)

44

*

Total Harmonic Distortion (THD) 48

*

Intermodulation Distortion (IMD) 60

*

Frequency Response

0.1

*

ANALOG INPUTS

Input Voltage Ranges, VINA, VINB

Input Currents, IINA, IINB

VBIAS – VSWING or 0

VBIAS + VSWING or 9.8

± 0.4

*

ADC REFERENCE INPUTS

Input Voltage Levels

VBIAS (ADC)

VSWING (ADC)

Input Currents

VBIAS (ADC) Input

VSWING (ADC) Input

2/6.8

*

2.0/3.0 *

± 800

*

±1

*

LOGIC OUTPUTS

DB0–DB7, INT

VOL, Output Low Voltage

VOH, Output High Voltage

DB0–DB7

Floating State Leakage Current

Floating State Capacitance2

Output Coding

0.4

*

4.0

*

± 10

*

10

*

Offset Binary

Bits

LSB max

LSB max

LSB max

LSB max

LSB max

LSB max

LSB max

LSB max

LSB max

LSB max

LSB max

LSB max

LSB max

LSB max

dB min

dB max

dB typ

dB typ

V min

V max

mA max

V min/max

V min/max

µA max

µA max

V max

V min

µA max

pF max

See Terminology

No Missing Codes. See Terminology.

See Terminology

Channel A to Channel B

See Terminology

Channel A to Channel B

Channel A/B to VOUT A/B

VBIAS (DAC) = +5 V, VSWING (DAC) = +2.5 V.

VIN = 100 kHz Full-Scale Sine Wave with fSAMPLING = 400 kHz

VIN = 100 kHz Full-Scale Sine Wave with fSAMPLlNG = 400 kHz

fa = 99 kHz, fb = 96.7 kHz with fSAMPLING = 400 kHz

VIN = Full-Scale, dc to 200 kHz Sine Wave

Whichever Is the Higher

Whichever Is the Lower

With Respect to AGND (ADC). For Specified Performance.

With Respect to AGND (ADC). For Specified Performance.

ISINK = 1.6 mA

ISOURCE = 200 µA

POWER REQUIREMENTS

VCC Range

4.75/5.25 *

V min/V max

VDD Range

IDD @ +25°C

VUBAm VINB = TMIN to TMAX

10.8/13.2 *

20

*

22

*

V min/V max

mA max

mA max

ICC @ +25°C

TMIN to TMAX

5

*

mA max

6

*

mA max

NOTES

1 Temperature range as follows: J Version: 0°C to +70°C; A Version: –40°C to +85°C.

2 Sample tested at +25°C to ensure compliance.

*Specification same as J Version.

Specifications subject to change without notice.

For Specified Performance. The Part Will Function with

VCC =5 V ± 10% with Degraded Performance.

For Specified Performance

For ADC and DAC: VBIAS = 5.0 V; VSWING = 3.0 V; VINA,

VBIAS; DAC Code = FF (Hex); DACA and DACB Load = 5 kΩ

to AGND (DAC). Typically IDD = 14 mA.

Logic Inputs = 2.4 V, CLK Input = 0.8 V. Typically ICC = 1.5 mA.

–2–

REV. A

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