STK12C68-5SF55I 查看數據表（PDF） - Simtek Corporation
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STK12C68-5SF55I Datasheet PDF : 13 Pages
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STK12C68
HARDWARE MODE SELECTION
E
W
HSB
A12 - A0 (hex)
H
X
H
X
L
H
H
X
L
L
H
X
X
X
L
X
L
H
H
0000
1555
0AAA
1FFF
10F0
0F0F
L
H
H
0000
1555
0AAA
1FFF
10F0
0F0E
MODE
Not Selected
Read SRAM
Write SRAM
Nonvolatile STORE
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile STORE
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile RECALL
I/O
Output High Z
Output Data
Input Data
Output High Z
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
POWER
Standby
Active
Active
lCC2
Active
lCC2
Active
NOTES
o
m
n, o
n, o
Note m: HSB STORE operation occurs only if an SRAM WRITE has been done since the last nonvolatile cycle. After the STORE (if any) completes,
the part will go into standby mode, inhibiting all operations until HSB rises.
Note n: The six consecutive addresses must be in the order listed. W must be high during all six consecutive cycles to enable a nonvolatile cycle.
Note o: I/O state assumes G < VIL. Activation of nonvolatile cycles does not depend on state of G.
HARDWARE STORE CYCLE
(VCC = 5.0V ± 10%)e
SYMBOLS
NO.
Standard
Alternate
PARAMETER
22
tSTORE
tHLHZ
23
tDELAY
tHLQZ
24
tRECOVER
tHHQX
25
tHLHX
26
tHLBL
STORE Cycle Duration
Time Allowed to Complete SRAM Cycle
Hardware STORE High to Inhibit Off
Hardware STORE Pulse Width
Hardware STORE Low to Store Busy
Note p: E and G low for output behavior.
Note q: E and G low and W high for output behavior.
Note r: tRECOVER is only applicable after tSTORE is complete.
HARDWARE STORE CYCLE
25
tHLHX
HSB (IN)
STK12C68
MIN MAX
10
1
700
15
300
UNITS NOTES
ms
i, p
µs
i, q
ns
p, r
ns
ns
24
tRECOVER
22
tSTORE
HSB (OUT)
DQ (DATA OUT)
HIGH IMPEDANCE
26
tHLBL
23
tDELAY
DATA VALID
HIGH IMPEDANCE
DATA VALID
October 2003
5 Document Control # ML0008 rev 0.4
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