MSM82C55A-2GS 查看數據表（PDF） - Oki Electric Industry
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MSM82C55A-2GS Datasheet PDF : 26 Pages
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¡ Semiconductor
MSM82C55A-2RS/GS/VJS
OPERATIONAL DESCRIPTION
Control Logic
Operations by addresses and control signals, e.g., read and write, etc. are as shown in the table
below:
Operaiton
A1 A0 CS WR RD
Operation
0
0
0
10
Port A Æ Data Bus
Input
0
1
0
10
Port B Æ Data Bus
1
0
0
10
Port C Æ Data Bus
0
0
0
01
Data Bus Æ Port A
Output
0
1
0
01
Data Bus Æ Port B
1
0
0
01
Data Bus Æ Port C
Control
1
1
0
01
Data Bus Æ Control Register
Others
1
1
0
¥
¥
1
10
¥¥
Illegal Condition
Data bus is in the high impedance status.
Setting of Control Word
The control register is composed of 7-bit latch circuit and 1-bit flag as shown below.
Group A Control Bits
Group B Control Bits
D7 D6 D5 D4 D3 D2 D1 D0
Control word Identification flag
Be sure to set 1 for the control word
to define a mode and input/output.
When set to 0, it becomes
the control word for bit set/
reset.
Definition of input/
output of low order
4 bits of port C.
Definition of input/
output of 8 bits of
port B.
Mode definition of
group B.
0 = Output
1 = Input
0 = Output
1 = Input
0 = Mode 0
1 = Mode 1
Definition of input/
output of high order
4 bits of port C.
Definition of input/
output of 8 bits of
port A.
0 = Output
1 = Input
0 = Output
1 = Input
Mode definition of group A.
D6 D5
00
01
1¥
Mode
Mode 0
Mode 1
Mode 2
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