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MJD44H11(2011) 查看數據表(PDF) - ON Semiconductor

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MJD44H11
(Rev.:2011)
ON-Semiconductor
ON Semiconductor ON-Semiconductor
MJD44H11 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
MJD44H11 (NPN) MJD45H11 (PNP)
1
0.7 D = 0.5
0.5
0.3
0.2
0.2
0.1
0.1 0.05
0.07
0.05 0.02
0.03
0.01
0.02 SINGLE PULSE
0.01
0.01 0.02 0.03 0.05 0.1
RqJC(t) = r(t) RqJC
RqJC = 6.25°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TC = P(pk) qJC(t)
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
0.2 0.3 0.5 1
2 3 5 10 20 30 50
t, TIME (ms)
Figure 1. Thermal Response
100 200 300 500 1 k
20
10
5
3
2
1
0.5
0.3
0.1
0.05
0.02
1
100 ms
500 ms
dc 5 ms
1 ms
THERMAL LIMIT @ TC = 25°C
WIRE BOND LIMIT
3 5 7 10
20 30 50 70 100
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 2. Maximum Forward Bias
Safe Operating Area
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 2 is based on TJ(pk) = 150_C; TC is
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided TJ(pk)
v 150_C. TJ(pk) may be calculated from the data in
Figure 1. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
TA TC
2.5 25
2 20
TC
1.5 15
1 10
0.5 5
TA
SURFACE
MOUNT
00
25
50
75
100
125
150
T, TEMPERATURE (°C)
Figure 3. Power Derating
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