5962-0054001QXC 查看數據表（PDF） - Atmel Corporation

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5962-0054001QXC

Rad-Hard 32-bit SPARC Embedded Processor

Atmel Corporation 

TSC695F

Synchronous Traps

Table 4. Synchronous Traps

Trap

Priority

Reset

1

Non-restartable, imprecise

error

2.1

Non-restartable,

precise error

2.2

Register file error

2.3

Restartable, late error

Restartable,

precise error

2.4

2 2.5

Instruction access

(Error on instruction fetch)

Illegal Instruction

Privileged instruction

FPU disabled

Overflow

Window Underflow

Memory address not aligned

Non-restartable error

Data bus error

Restartable error

Sequence error

Unimplemented FPop

3

4

5

6

7

8

9.1

9.2

9.3

9.4

9.5

IEEE exceptions:

9 9.6

Trap Type (tt) Comments

Sources: SYSRESET* pin

software reset

watchdog reset

–

IU or System error reset

Severe error requiring a re-boot

64h

TSC695F enters (if not masked) in halt or reset mode

Error not removable, PC & nPC OK

62h

TSC695F enters (if not masked) in halt or reset mode

Special case of non-restartable, precise error.

65h

TSC695F enters (if not masked) in halt or reset mode

Retrying instruction but PC & nPC have to be re-adjusted

63h

TSC695F enters (if not masked) in halt or reset mode

Retrying instruction

61h

TSC695F enters (if not masked) in halt or reset mode

Parity error on control bus

Parity error on data bus

Parity error on address bus

Access to protected or unimplemented area

Uncorrectable error in memory

Bus time out

01h

Bus error

02h

–

03h

–

04h

–

05h

During SAVE instruction or trap taken

06h

During RESTORE instruction or RETT instruction

07h

–

Severe error, cannot restart the instruction

Parity error on FPU data bus

Can be removed restarting the instruction

–

–

Invalid operation

Division by zero

Overflow

Underflow

08h

Inexact

9

4118J–AERO–08/04

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