AD9805 查看數據表（PDF） - Analog Devices

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AD9805

Complete 12-Bit/10-Bit 6 MSPS CCD/CIS Signal Processors

Analog Devices 

AD9807/AD9805

ANALOG

INPUTS

STRTLN

CDSCLK1

tAD

R0, G0, B0

tAD

tC1A

tC1C2A

tC2C1A

R1, G1, B1

tCRA

CDSCLK2

tC1AD

tC2A

tACLK tACLK

tSTL1

ADCCLK

R

G

B

R

G

B

R

tCP2

GAIN<n:0>

OFFSET<m:0> R0

G0

B0

R1

G1

B1

Rn, Gn, Bn

tS

tH

G

B

tGOS

tGOH

Figure 1a. 3-Channel CDS-Mode Clock Timing

ANALOG

INPUTS (0V)

STRTLN

CDSCLK1

ADCCLK

GAIN<n:0>

OFFSET<m:0>

R0, G0, B0

tAD

tC2A

R1, G1, B1

tCRA

tACLK tACLK

tCP

tSTL1

Rn, Gn, Bn

tS

tH

tGOS

tGOH

Figure 1b. 3-Channel SHA-Mode Clock Timing

ANALOG

INPUTS

STRTLN

CDSCLK1

tAD

tC1B

tC1C2B

PIXEL 0

tAD

tC2C1B

PIXEL 1

tCRB

CDSCLK2

ADCCLK

GAIN<n:0>

OFFSET<m:0>

tACLK

tC2B

tACLK

tCP

G0

tSTL2

G1

G2

PIXEL n

tS

tH

tGOS

tGOH

Figure 1c. 1-Channel CDS-Mode Clock Timing (for B and G Only)

–8–

REV. 0

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