AD9822JRS 查看數據表（PDF） - Analog Devices

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AD9822JRS

Complete 14-Bit CCD/CIS Signal Processor

Analog Devices 

AD9822

ANALOG

INPUTS

CDSCLK2

ADCCLK

OUTPUT

DATA

D<7:0>

tADCLK

PIXEL N (R, G, B)

tAD

tC2

tC2ADF

tADC2

tC2ADR

PIXEL (N + 1)

tPRA

tADCLK

tOD

R (N– 2) G (N– 2) G (N– 2) B (N– 2) B (N– 2) R (N– 1) R (N– 1) G (N– 1) G (N– 1) B (N– 1) B (N– 1) R (N)

R (N)

G (N)

G (N)

HIGH LOW HIGH LOW HIGH LOW HIGH LOW HIGH LOW HIGH LOW HIGH LOW

BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE

Figure 5. 3-Channel SHA Mode Timing

ANALOG

INPUTS

CDSCLK2

ADCCLK

OUTPUT

DATA

D<7:0>

PIXEL (N – 4)

HIGH BYTE

PIXEL N

tAD

tC2

tPRB

tC2ADR

tADCLK

PIXEL (N – 4)

LOW BYTE

tC2ADF

tADCLK

tOD

PIXEL (N – 3)

HIGH BYTE

PIXEL (N – 3)

LOW BYTE

PIXEL (N – 2)

HIGH BYTE

Figure 6. 1-Channel SHA Mode Timing

PIXEL (N – 2)

LOW BYTE

Rev. B | Page 10 of 20

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