LTC1401 查看數據表（PDF） - Linear Technology

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LTC1401

Complete SO-8, 12-Bit, 200ksps ADC with Shutdown

Linear Technology 

LTC1401

APPLICATIONS INFORMATION

R1

50Ω

VIN

+

A1

R2

10k

–

R4

100Ω

AIN

LTC1401

R3

10k

FULL-SCALE

ADJUST

GND

ADDITIONAL PINS OMITTED FOR CLARITY

±20LSB TRIM RANGE

LTC1401 • F09a

Figure 9a. LTC1401 Full-Scale Adjust Circuit

R1

ANALOG 10k

INPUT

0V TO 2.048V

10k

3V

+

R2

A1

10k

–

R9

20Ω

AIN

R4

100k

R5

4.3k

FULL-SCALE

ADJUST

LTC1401

R3

100k

R7

100k

R6

400Ω

3V

R8

10k

OFFSET

ADJUST

LTC1401 • F09b

Figure 9b. LTC1401 Offset and Full-Scale Adjust Circuit

optimum performance, a 10µF surface mount AVX capaci-

tor in parallel with a 0.1µF ceramic is recommended for the

VCC and VREF pins. The capacitors must be located as close

to the pins as possible. The traces connecting the pins and

the bypass capacitors must be kept short and should be

made as wide as possible.

Input signal leads to AIN and signal return leads from GND

(Pin 4) should be kept as short as possible to minimize

noise coupling. In applications where this is not possible,

a shielded cable between the analog input signal and the

ADC is recommended. Also, any potential difference in

grounds between the analog signal and the ADC appears

as an error voltage in series with the analog input signal.

Attention should be paid to reducing the ground circuit

impedance as much as possible.

Figure 10 shows the recommended system ground con-

nections. All analog circuitry grounds should be termi-

nated at the LTC1401 GND pin. The ground return to the

power supply from Pin 4 should be low impedance for

noise free operation. Digital circuitry grounds must be

connected to the digital supply common.

ANALOG SUPPLY

GND

3V

DIGITAL SUPPLY

GND

3V

+

+

BOARD LAYOUT AND BYPASSING

Wire wrap boards are not recommended for high resolu-

tion or high speed A/D converters. To obtain the best

performance from the LTC1401, a printed circuit board is

required. Layout for the printed circuit board should

ensure that digital and analog signal lines are separated as

much as possible. In particular, care should be taken not

to run any digital traces alongside an analog signal trace

or underneath the ADC. The analog input should be

screened by GND.

High quality tantalum and ceramic bypass capacitors

should be used at the VCC and VREF pins as shown in the

Typical Application on the first page of this datasheet. For

GND

VCC

GND

VCC

LTC1401

DIGITAL CIRCUITRY

LTC1401 • F10

Figure 10. Power Supply Connection

Power-Down Mode

Upon power up, the LTC1401 is initialized to the active

state and is ready for conversion. However, the chip can be

easily placed into Nap or Sleep mode by exercising the

right combination of CLK and CONV signals. In Nap mode,

all power is off except the internal reference which remains

active and provides 1.20V output voltage to the other

11

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