ADM9240 查看數據表（PDF） - Analog Devices

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ADM9240

Low Cost Microprocessor System Hardware Monitor

Analog Devices 

ADM9240

Parameter

Min Typ Max

Units Test Conditions/Comments

OPEN-DRAIN SERIAL DATA BUS

OUTPUT (SDA)

Output Low Voltage, VOL

High Level Output Current, IOH

SERIAL BUS DIGITAL INPUTS

(SCL, SDA)

Input High Voltage, VIH

Input Low Voltage, VIL

Hysteresis

0.4

0.4

0.1

100

V

IOUT = –3.0 mA,

VCC = 4.25 V–5.75 V

V

IOUT = –3.0 mA

VCC = 2.85 V–3.45 V

µA

VOUT = VCC

0.7 × VCC

500

V

0.3 × VCC V

mV

DIGITAL INPUT LOGIC LEVELS

(A0, A1, CI, RESET, VID0 – VID4,

FAN1, FAN2)

Input High Voltage, VIH

2.4

Input Low Voltage, VIL

Input High Voltage, VIH

2.0

Input Low Voltage, VIL

NTEST_IN

Input High Voltage, VIH

2.4

Input High Voltage, VIH

2.0

V

VCC = 4.25 V–5.75 V

0.8

V

VCC = 4.25 V–5.75 V

V

VCC = 2.85 V–3.45 V

0.4

V

VCC = 2.85 V–3.45 V

V

VCC = 4.25 V–5.75 V

V

VCC = 2.85 V–3.45 V

DIGITAL INPUT CURRENT

Input High Current, IIH

Input High Current, A0, A1, IIH

Input Low Current, IIL

Input Capacitance, CIN

SERIAL BUS TIMING7

Clock Frequency, fSCLK

Glitch Immunity, tSW

Bus Free Time, tBUF

Start Setup Time, tSU;STA

Start Hold Time, tHD;STA

SCL Low Time, tLOW

SCL High Time, tHIGH

SCL, SDA Rise Time, tR

SCL, SDA Fall Time, tF

Data Setup Time, tSU;DAT

Data Hold Time, tHD;DAT

–1

–200 75

1

20

400

50

1.3

600

600

1.3

0.6

300

300

100

900

µA

VIN = VCC

µA

VIN = VCC (Note 6)

µA

VIN = 0

pF

kHz

See Figure 1

ns

See Figure 1

µs

See Figure 1

ns

See Figure 1

ns

See Figure 1

µs

See Figure 1

µs

See Figure 1

ns

See Figure 1

µs

See Figure 1

ns

See Figure 1

ns

See Figure 1

NOTES

1All voltages are measured with respect to GND, unless otherwise noted.

2Typicals are at TA = +25°C and represent most likely parametric norm. Shutdown current typ is measured with VCC = 3.3 V.

3TUE (Total Unadjusted Error) includes Offset, Gain and Linearity errors of the ADC, multiplexer and on-chip input attenuators, including an external series input

protection resistor value between zero and 1 kΩ.

4Total monitoring cycle time is the time taken to measure all six analog inputs plus the temperature sensor.

5The total fan count is based on 2 pulses per revolution of the fan tachometer output.

6A0 and A1 have internal 75 kΩ pull-down.

7Timing specifications are tested at logic levels of VIL = 0.3 × VCC for a falling edge and VIH = 0.7 × VCC for a rising edge.

Specifications subject to change without notice.

REV. 0

–3–

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